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Observer
Observer
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Registered: ‎12-20-2018

stand alone vivado HLS

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1.how to install stand alone HLS?

2.i want to create bit and tcl file for image resize to accelrate function in pynq overlay.for that first i create image resize ip in vivado hls.In that mostly all code udes hdmi port for vedio application.In my case i give image input to SD card of the board.recently i saw one link..in this xfopencv liberary port into hls that will need to change CFLAG..IN xfopencv lib only access data from PS.i changed the CFLAG as D_XFHLS_ -std=c++0x.but compilation error.

How to resolve the problem?

In file included from C:/Xilinx/Vivado/2019.1/include/hls_fpo.h:186:0,
from C:/Xilinx/Vivado/2019.1/include/hls_half.h:44,
from C:/Xilinx/Vivado/2019.1/include/etc/ap_private.h:90,
from C:/Xilinx/Vivado/2019.1/include/ap_common.h:641,
from C:/Xilinx/Vivado/2019.1/include/ap_int.h:54,
from ../../../../PYNQ-DL-master/resize/hls/resize/xf_resize_config.h:34,
from ../../../../PYNQ-DL-master/resize/hls/resize/xf_resize_tb.cpp:31:
C:/Xilinx/Vivado/2019.1/include/floating_point_v7_0_bitacc_cmodel.h:135:0: note: this is the location of the previous definition
#define __GMP_LIBGMP_DLL 1

<command-line>:0:1: error: macro names must be identifiers
In file included from C:/Xilinx/Vivado/2019.1/include/floating_point_v7_0_bitacc_cmodel.h:143:0,
from C:/Xilinx/Vivado/2019.1/include/hls_fpo.h:186,
from C:/Xilinx/Vivado/2019.1/include/hls_half.h:44,
from C:/Xilinx/Vivado/2019.1/include/etc/ap_private.h:90,
from C:/Xilinx/Vivado/2019.1/include/ap_common.h:641,
from C:/Xilinx/Vivado/2019.1/include/ap_int.h:54,
from ../../../../PYNQ-DL-master/resize/hls/resize/xf_resize_config.h:34,
from ../../../../PYNQ-DL-master/resize/hls/resize/xf_resize_accel.cpp:30:
C:/Xilinx/Vivado/2019.1/include/gmp.h:62:0: warning: "__GMP_LIBGMP_DLL" redefined
#define __GMP_LIBGMP_DLL 0

In file included from C:/Xilinx/Vivado/2019.1/include/hls_fpo.h:186:0,
from C:/Xilinx/Vivado/2019.1/include/hls_half.h:44,
from C:/Xilinx/Vivado/2019.1/include/etc/ap_private.h:90,
from C:/Xilinx/Vivado/2019.1/include/ap_common.h:641,
from C:/Xilinx/Vivado/2019.1/include/ap_int.h:54,
from ../../../../PYNQ-DL-master/resize/hls/resize/xf_resize_config.h:34,
from ../../../../PYNQ-DL-master/resize/hls/resize/xf_resize_accel.cpp:30:
C:/Xilinx/Vivado/2019.1/include/floating_point_v7_0_bitacc_cmodel.h:135:0: note: this is the location of the previous definition
#define __GMP_LIBGMP_DLL 1

while executing
"source C:/Xilinx/Vivado/2019.1/win64/tools/Resize/solution1/csim.tcl"
invoked from within
"hls::main C:/Xilinx/Vivado/2019.1/win64/tools/Resize/solution1/csim.tcl"
("uplevel" body line 1)
invoked from within
"uplevel 1 hls::main {*}$args"
(procedure "hls_proc" line 5)
invoked from within
"hls_proc $argv"
Finished C simulation.

https://github.com/Xilinx/PYNQ-DL/tree/master/resize/hls



make: *** [obj/xf_resize_accel.o] Error 1
ERR: [SIM 100] 'csim_design' failed: compilation error(s).
INFO: [SIM 3] *************** CSIM finish ***************

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Moderator
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Registered: ‎05-27-2018

回复: stand alone vivado HLS

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Hi xilin@x ,

    Open the HLS terminal then cd to the ..\xfopencv-master\HLS_Use_Model\Standalone_HLS_Example dictionary and run the script tcl.

    The first goal is to run the Cosim, so open the script.tcl and disable the following progress.

#csynth_design
#cosim_design -argv {testcase55.jpg}
#export_design -format ip_catalog
vivado_hls -f script.tcl

 

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Registered: ‎05-27-2018

回复: stand alone vivado HLS

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Hi xilin@x ,

   1、It makes no sense in "install" stand alone vivado HLS, as it comes with the whole vivado design suites.The Vivado HLS License is based off of the Vivado synthesis license and is not a separate license. When a Vivado edition is licensed, so is Vivado HLS. 

   2、Carefully Follow the UG1233 chapter 4 to run vivado HLS in stand alone mode.

   Note that when you are using Vivado HLS in the Windows operating system, make sure to provide the -std=c++0x flag only for C-Sim and Co-Sim. Do not include the flag when performing synthesis

   Try and see if the error could be solved.

 

Thanks,

Wen

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Observer
Observer
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Registered: ‎12-20-2018

回复: stand alone vivado HLS

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I am new for vivado ..you mentioned that vivado hls run in standalone mode that mean?  I followed chapter 4 instructions..Am using window operating system...for c simulation only I changed CFlag option..but I got error...Am using vivado 2018.3 webpack version

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Registered: ‎05-27-2018

回复: stand alone vivado HLS

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Hi xilin@x ,

     I have successfully run the HLS_stand_alone example using the GUI mode.

     Make sure you include the lib path correctly in the simulation settings and add the cflag.

     Attached is the zip file of the example project build in Vivado HLS 2019.1 .

dilation_hls_standalone.PNG

Thanks,

Wen

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Observer
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Registered: ‎12-20-2018

回复: stand alone vivado HLS

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I downloaded your standaloneHLS.zip and tried to run in my vivado 2018.2 version.i edited CFLAG (i attached screenshot with this doc name error).i got error

INFO: [SIM 2] *************** CSIM start ***************
INFO: [SIM 4] CSIM will launch GCC as the compiler.
Compiling ../../../../../../../../Desktop/Standalone_HLS_Example/xf_dilation_tb.cpp in debug mode
csim.mk:78: recipe for target 'obj/xf_dilation_tb.o' failed
In file included from C:/Xilinx/Vivado/2018.3/include/floating_point_v7_0_bitacc_cmodel.h:143:0,
from C:/Xilinx/Vivado/2018.3/include/hls_fpo.h:186,
from C:/Xilinx/Vivado/2018.3/include/hls_half.h:44,
from C:/Xilinx/Vivado/2018.3/include/etc/ap_private.h:90,
from C:/Xilinx/Vivado/2018.3/include/ap_common.h:641,
from C:/Xilinx/Vivado/2018.3/include/ap_int.h:54,
from C:/Users/Kayal/Desktop/Standalone_HLS_Example/xf_headers.h:37,
from ../../../../../../../../Desktop/Standalone_HLS_Example/xf_dilation_tb.cpp:33:
C:/Xilinx/Vivado/2018.3/include/gmp.h:62:0: warning: "__GMP_LIBGMP_DLL" redefined
#define __GMP_LIBGMP_DLL 0

In file included from C:/Xilinx/Vivado/2018.3/include/hls_fpo.h:186:0,
from C:/Xilinx/Vivado/2018.3/include/hls_half.h:44,
from C:/Xilinx/Vivado/2018.3/include/etc/ap_private.h:90,
from C:/Xilinx/Vivado/2018.3/include/ap_common.h:641,
from C:/Xilinx/Vivado/2018.3/include/ap_int.h:54,
from C:/Users/Kayal/Desktop/Standalone_HLS_Example/xf_headers.h:37,
from ../../../../../../../../Desktop/Standalone_HLS_Example/xf_dilation_tb.cpp:33:
C:/Xilinx/Vivado/2018.3/include/floating_point_v7_0_bitacc_cmodel.h:135:0: note: this is the location of the previous definition
#define __GMP_LIBGMP_DLL 1

In file included from ../../../../../../../../Desktop/Standalone_HLS_Example/xf_dilation_tb.cpp:34:0:
C:/Users/Kayal/Desktop/Standalone_HLS_Example/xf_dilation_config.h:38:35: fatal error: imgproc/xf_dilation.hpp: No such file or directory
#include "imgproc/xf_dilation.hpp"
^
compilation terminated.
make: *** [obj/xf_dilation_tb.o] Error 1
ERR: [SIM 100] 'csim_design' failed: compilation error(s).
INFO: [SIM 3] *************** CSIM finish ***************

How to resolve this error?

 

 

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Registered: ‎05-27-2018

回复: stand alone vivado HLS

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Hi xilin@x ,

     Still a lib linking problem. When you open the project I gave directly, the project opens in a system default path C:\Users\Kayal\AppData\Roaming\Xilinx\Vivado\dilation , and the relative paths of all source files and libraries in it has changed.

    Try to build the project in the .../xfopencv-master/HLS_Use_Model/Standalone_HLS_Example directory and follow the steps in UG1233. The Windows OS may have problems linking a long dictionary path.

   dilation_hls_pro.PNG

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Observer
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Registered: ‎12-20-2018

回复: stand alone vivado HLS

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AS foolowed your steps..same directory path but same error occured..

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Registered: ‎05-27-2018

回复: stand alone vivado HLS

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Hi xilin@x ,

    Open the HLS terminal then cd to the ..\xfopencv-master\HLS_Use_Model\Standalone_HLS_Example dictionary and run the script tcl.

    The first goal is to run the Cosim, so open the script.tcl and disable the following progress.

#csynth_design
#cosim_design -argv {testcase55.jpg}
#export_design -format ip_catalog
vivado_hls -f script.tcl

 

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Observer
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Registered: ‎12-20-2018

回复: stand alone vivado HLS

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Thankyou sir,As per your guidelines run the project in tcl mode..c/RTL simulation gives pass without error..how can i open the results in gui mode..how can i see the results?

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Registered: ‎05-27-2018

回复: stand alone vivado HLS

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Hi xilin@x ,

    Taking up some tutorial on UG871 will help you build standard HLS design either in GUI or TCL command.

vivado_hls -p dilation_project.prj
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