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Visitor mjl-0708
Visitor
8,958 Views
Registered: ‎05-07-2013

About "IOB = TRUE" warning?

When I implement my design , the following warnings appears.

 

The signal has the property "IOB = TRUE", but can't  be put into IOB.

 

What cause the warnings?

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9 Replies
Teacher rcingham
Teacher
8,957 Views
Registered: ‎09-09-2010

Re: About "IOB = TRUE" warning?

Which FPGA?
What version of tools?
Do you get the warning message for all ports, or only some?
Can you post the HDL?

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"If it don't work in simulation, it won't work on the board."
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Scholar pratham
Scholar
8,955 Views
Registered: ‎06-05-2013

Re: About "IOB = TRUE" warning?

Hi,

Refer this AR
http://www.xilinx.com/support/answers/35507.html

Regards,
Prathameh

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Instructor
Instructor
8,938 Views
Registered: ‎08-14-2007

Re: About "IOB = TRUE" warning?

You can get this warning even if you don't have an IOB = "TRUE" attribute in your source code.  It can also happen if you have the synthesis settings for "Pack I/O registers into IOB" (-iob for command line) set to yes.  The default setting of "Auto" should not cause this warning.

 

If you think your register for this signal should have packed into an IOB, then perhaps you can post the code so we can see why it might not be eligible for placement in the IOB.

-- Gabor
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Xilinx Employee
Xilinx Employee
8,923 Views
Registered: ‎07-16-2008

Re: About "IOB = TRUE" warning?

Please firstly ensure that the FF in question is eligible for being packed into IOB.

Some of the causes of failure to pack IO register into IOB are documented in the following AR.

http://www.xilinx.com/support/answers/35520.htm

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Community Manager
Community Manager
8,913 Views
Registered: ‎06-14-2012

Re: About "IOB = TRUE" warning?

You could open the synthesized design and check on its connection.

As garce suggested, check with all the criterias listed in the AR.

 

As test, try with IOB set to force. Thsi helps in certain design scenarios. 

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Visitor mjl-0708
Visitor
8,900 Views
Registered: ‎05-07-2013

Re: About "IOB = TRUE" warning?

Thank you first.

I set the property "Pack I/O registers into IOB" , I hope this can use FFs in IOB and reduce the general FFs.

 

All warnings is about sub-module , the top module have no warnings.

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Visitor mjl-0708
Visitor
8,899 Views
Registered: ‎05-07-2013

Re: About "IOB = TRUE" warning?

V4, ISE14.1,
only sub-module ports, the top module ports have no this warnings.
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Xilinx Employee
Xilinx Employee
8,891 Views
Registered: ‎09-20-2012

Re: About "IOB = TRUE" warning?

Hi,

Are you trying to apply iob property on flops which are in submodule but directly connected to top level ports?

Did you try using the switch -ignore_keep_hierarchy in map?

Thanks,
Deepika.
Thanks,
Deepika.
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Visitor mjl-0708
Visitor
8,852 Views
Registered: ‎05-07-2013

Re: About "IOB = TRUE" warning?

I didnt apply IOB property on FLOPS in sub-module,  and I set the "keep-hierarchy" property TRUE,  

maybe this caused this warning, I will try again.

 

Thanks very much!

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