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cvasselin
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Registered: ‎08-02-2018

Cannot generate bitstream

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Hello,

 

I use Vivado 2017.4; When I run Synthesis and Implementation everything seems ok.

But when I want to generate the bitstream file nothing happens with no error messages. 

There is no bitstream file in the .runs/impl_l directory as expected.; only some .tcl .sh .xml files..

 

 

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cvasselin
Observer
Observer
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Registered: ‎08-02-2018

Hello,

 

I've done the reset and now It's works now !

Thank you very much !

 

Best regards,

 

View solution in original post

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hj
Moderator
Moderator
1,417 Views
Registered: ‎06-05-2013
Can you share the vivado log? It might give us a clue.

Thanks
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For more information please refer to configuration resources https://forums.xilinx.com/t5/FPGA-Configuration/Configuration-Resources/m-p/753763/highlight/true#M5891
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Don’t forget to reply, kudo, and accept as solution.
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cvasselin
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Registered: ‎08-02-2018

You wil find attached the TCL console logs that I've got when I launched the project and made a synthesis, implementation and try to generate bitstream.

I have no others logs form logs screen or messages.

 

Best regards,

 

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syedz
Moderator
Moderator
1,337 Views
Registered: ‎01-16-2013

@cvasselin,

 

Can you reset the synthesis run and try running the complete flow again? The log file shared in your previous post doesn't provide much information. Right click on Run Synthesis and select Reset Synthesis run as shown in below image: 

Capture.JPG

 

Share the runme.log file which will be present in <project>/<project>.runs/impl_1/runme.log. 

Also how long did you wait to confirm that bit file is not generated. 

 

--Syed

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cvasselin
Observer
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1,438 Views
Registered: ‎08-02-2018

Hello,

 

I've done the reset and now It's works now !

Thank you very much !

 

Best regards,

 

View solution in original post