04-15-2010 03:25 AM
When I implement Chipscope (ILA + ICON), the resource usage on the FPGA in XPS comes back as zero (slices) for those modules. Does anybody know why this is? Does chipscope use dedicated hardware, or am I missing something fundamental?
04-15-2010 05:09 AM
At the end of the day, ICON & ILA resource utilization should definitely be non-zero.
That said, I'm using synplify for synthesis (not XST).
Are you instantiating them manually? I kow that at first Synplify used to sometimes prune these away, and I had to add a synthesis directive to tell it not to do that. Maybe the same is happening for you?
If you don't think that's the problem, you will probably want to put more details about your usage and code snippets so others can better help you.
04-15-2010 06:30 AM
Thanks for the reply. I'm adding them in the system assembly view of XPS from the IP catalog, and making the appropriate connections on the "Ports" tab. I'm not instantiating the chipscope IP in text. I can confirm that they're instantiated in the final system as I've been getting real results from the probe when deployed to hardware over JTAG.
The design summary window in XPS lists 0 slices under "XPS Synthesis Summary". However, the Module Level Utilisation tab lists chipscope and gives a non-zero result for the number of slices used.
This indicates that I'm probably misinterpreting results - I'll rely on the results in Module Level Utilization rather than the XPS Synthesis Summary. I'm not sure why chipscope doesn't show up in the latter.
04-21-2010 12:08 AM
The issue is likely a result of the way the Chipscope cores are handled differently in the build process than the other EDK cores. It is effectively a precompiled netlist and not actually synthesized by XST here.