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517 Views
Registered: ‎08-28-2019

[DRC UCIO-1] Unconstrained Logical Port: 3 out of 55 logical ports have no user assigned specific location constraint (LOC).

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I merged two projects into one and ran implementation successfully,but when I generated bitstream I got:

20191023185535.png

Xdc files of two projects have also been merged and they two can work in their own projects. Why merged xdc can't work?

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329 Views
Registered: ‎06-21-2017

Re: [DRC UCIO-1] Unconstrained Logical Port: 3 out of 55 logical ports have no user assigned specific location constraint (LOC).

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Can one wizard generate all of the clocks?  Could you eliminate one of the wizards? 

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513 Views
Registered: ‎06-21-2017

Re: [DRC UCIO-1] Unconstrained Logical Port: 3 out of 55 logical ports have no user assigned specific location constraint (LOC).

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The error is telling you that you have not assigned the ports sys_clk_p, sys_clk_n or sys_rst to pins.  You must assign pins to these signals or you must remove them. 

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501 Views
Registered: ‎08-28-2019

Re: [DRC UCIO-1] Unconstrained Logical Port: 3 out of 55 logical ports have no user assigned specific location constraint (LOC).

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Thanks for your reply,but I can clearly see the assignment of them. The two xdc files are valid in two seperate projects,but invalid in a merged one.
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492 Views
Registered: ‎06-21-2017

Re: [DRC UCIO-1] Unconstrained Logical Port: 3 out of 55 logical ports have no user assigned specific location constraint (LOC).

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Try searching through your placer warnings.  Search for the signal names and see if any warnings pertain to them.

423 Views
Registered: ‎08-28-2019

Re: [DRC UCIO-1] Unconstrained Logical Port: 3 out of 55 logical ports have no user assigned specific location constraint (LOC).

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Thank you so much. As you suggested, I finally found that I assigned two clocks to the same pin, but the frequency of these two clocks needs to be different. Could you tell me what I should do?
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416 Views
Registered: ‎06-21-2017

Re: [DRC UCIO-1] Unconstrained Logical Port: 3 out of 55 logical ports have no user assigned specific location constraint (LOC).

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Assign those two clocks to different pins.

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Xilinx Employee
Xilinx Employee
387 Views
Registered: ‎05-22-2018

Re: [DRC UCIO-1] Unconstrained Logical Port: 3 out of 55 logical ports have no user assigned specific location constraint (LOC).

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Hi xzwang@hnu.edu.cn ,

An addon.

Please check the below AR for detailed information on the DRC you are facing :
https://www.xilinx.com/support/answers/56354.html 

Thanks,

Raj

366 Views
Registered: ‎08-28-2019

Re: [DRC UCIO-1] Unconstrained Logical Port: 3 out of 55 logical ports have no user assigned specific location constraint (LOC).

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I found that there is only one 200Mhz clock on my FPGA, but two 200M clocks are needed in the project, and these two clocks are connected to Clocking Wizard respectively. So is there any way to solve this problem? Thanks.

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346 Views
Registered: ‎06-21-2017

Re: [DRC UCIO-1] Unconstrained Logical Port: 3 out of 55 logical ports have no user assigned specific location constraint (LOC).

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Are these physically different 200MHz clocks or is this the same clock going to two wizards?

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335 Views
Registered: ‎08-28-2019

Re: [DRC UCIO-1] Unconstrained Logical Port: 3 out of 55 logical ports have no user assigned specific location constraint (LOC).

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The same one 200Mhz clock is going to two wizards
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330 Views
Registered: ‎06-21-2017

Re: [DRC UCIO-1] Unconstrained Logical Port: 3 out of 55 logical ports have no user assigned specific location constraint (LOC).

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Can one wizard generate all of the clocks?  Could you eliminate one of the wizards? 

View solution in original post

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324 Views
Registered: ‎08-28-2019

Re: [DRC UCIO-1] Unconstrained Logical Port: 3 out of 55 logical ports have no user assigned specific location constraint (LOC).

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I solved the problem as you suggested. Thank you so much!
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