05-12-2015 05:37 PM
I am having a block diagram design,where I route an internal jitter attenuator clock(si5324) clock to my input clock ports, which are input to my custom logic.
The design synthesizes succesfully.I face the following error upon implementation:
"REQP-1619#1 Error
IBUFDS_GTE2_driven_by_IBUF
IBUFDS_GTE2 PS_plus_fabric_i/tengig_spi_0/inst/ten_gig_eth_pcs_pma_core_support_layer_i/ten_gig_eth_pcs_pma_shared_clock_reset_block/ibufds_inst pins I and IB should be driven by IBUFs."
Upon looking up at forum posts related to it, I edited the top level Verilog wrapper to add IBUF explicitly to each of these signals, and tried running with the edited wrapper. I can see the IBUFs initated in my elaborated design step, but they get dropped again during synthesis design step, and now I get the error:
"[Opt 31-38] IBUFDS_GTE2 PS_plus_fabric_i/tengig_spi_0/inst/ten_gig_eth_pcs_pma_core_support_layer_i/ten_gig_eth_pcs_pma_shared_clock_reset_block/ibufds_inst I pin is connected directly to a top-level port. An IBUF must be inserted in between the port and the IBUFDS_GT"
In what case will something be present in elaborated design but dropped from synthesized design ( I notice this in schematic view for both steps).
Can you help me fix the orginal error as well?
05-12-2015 08:56 PM
Hi,
Can you check if by any chance the wrapper is being regenerated during synthesis and your changes are lost?
Thanks,
Deepika.
05-12-2015 08:29 PM
Hello @multiprobe
Can you try adding the DONT_TOUCH attribute on the instantiated IBUF and check whether it is dropped?
See the section "DONT_TOUCH" in the following user guide: http://www.xilinx.com/support/documentation/sw_manuals/xilinx2014_4/ug901-vivado-synthesis.pdf
Thanks,
Vinay
05-12-2015 08:56 PM
Hi,
Can you check if by any chance the wrapper is being regenerated during synthesis and your changes are lost?
Thanks,
Deepika.
05-13-2015 07:08 AM
Hi,
Can you share the attribute applied in RTL to infer IBUF and also the complete implementation log file?
--Syed
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07-02-2019 04:03 AM
In our module there is no IBUF module. But it shows this error. How can i rectify it. Can you please help me to resolve this issue?
[DRC REQP-1619] IBUFDS_GTE2_driven_by_IBUF: IBUFDS_GTE2 U_gtwizard_virtex_inst/inst/gt_usrclk_source/ibufds_instQ1_CLK0 pins I and IB should be driven by IBUFs.