09-24-2018 11:28 PM
I have a design, the implementation run is taking 9 to 10 hours. I want to reduce the run time of the design. In synthesis and implementation strategies i find RUNTIMEOPTIMIZED option, will it be helpful and lunch runs also i selected max 40 runs, still the run time has been not reducing. Is there any way to do this?
Please let me know.
Thanks in advance.
09-24-2018 11:49 PM - edited 09-24-2018 11:52 PM
The following factors affect the runtime during implementation:
> Bad constraints.
> very high device utilization
Check AR#50199 to find which particular process in implementation is taking longer runtime from log file.
Flow_Quick : If the goal is to check utilization estimation, use Flow_Quick implementation strategy which is non-timing driven and gives the fastest possible runtime.
Flow_RuntimeOptimized: This is timing driven with faster runtime but trades design performance.
You must provide clean timing constraints, along with timing exceptions, where applicable. Bad constraints result in long runtime, performance issues, and hardware failures.
Querying the large list of nets or pins can be a time-consuming process, so saving the results can speed the design flow when accessing the information repeatedly. Check if you can avoid using wild cards (*) which are querying very large list.
Caching objects in variables can save runtime by reducing the number of queries to the design database. See "Caching Objects" in UG894
Tip: For timing constraint use -filter IS_SEQUENTIAL with get_cells command to target only sequential elements.
Run DRC report (report_drc) and Methodology report (report_methodology) with the clocking, timing and XDC ruledecks , these should identify runtime intensive constraint constructs that target too many endpoints.
Congestion in design will impact on runtime. Check AR#66314 to resolve congestion
Use -ultrathreads option with route_design command to reduce runtime at expense of repeatability.
09-25-2018 12:53 AM
Do you see number of node overlaps messages in your implementation stage? It will be visible in implementation log. If the values of it are in millions than it is one of the root cause of your high runtime. Please check and let us know.
09-29-2018 04:25 AM
High number of node overlaps (in millions) is one of the reason of your high impl. runtime.
Node overlaps value is due to these multiple reasons:
Factors which determines node overlap values are
1. Routing Congestion in your design
2. Proper Floor planning of your design
3. Clock planning/networking
09-30-2018 10:43 PM
Thanks for the reply again,
I can see some Routing Convergence in the log file and timing also not meeting and utilization also more than 75 %. How to reduce this congestion ?
As you said what does the meaning of Proper Floor planning of your design ? How to do that ?
09-30-2018 11:41 PM - edited 09-30-2018 11:42 PM
If you are using Vivado 2018.2 - you can run a command report_qor_suggestions after implementation completes. It will show the suggestions to overcome congestion and timing related issues.
For congestion , go through this AR. https://www.xilinx.com/support/answers/66314.html
For timing violation, - it may possible that router is taking more time to fix the hold violation If this is the case you can find the warnings/critical warnings related to it in implementation log file. - For that you need to check the timing reports prior to route_design and work according to it.
To check what is proper floorplanning and how to do that in your design. For that there are number of checks and suggestions which are mentioned in the UG 906, Page 264 onwards. https://www.xilinx.com/support/documentation/sw_manuals/xilinx2018_2/ug906-vivado-design-analysis.pdf