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surf99
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Registered: ‎03-01-2011

Direct Connections

Hi,

 

I was trying to look for "Direct Connections" interconnect lines between CLBs (for Spartan-3E) in FPGA Editor but only found "Long", "Hex" and "Double" lines. Are "Direct Connections" also classified as "Double" lines in FPGA Editor?

 

Thanks.

 

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ywu
Xilinx Employee
Xilinx Employee
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Registered: ‎11-28-2007

In what context when you say "Direct Connections"? All those routing resources are direct connections. The difference is how many CLBs they can reach.

 


@surf99 wrote:

Hi,

 

I was trying to look for "Direct Connections" interconnect lines between CLBs (for Spartan-3E) in FPGA Editor but only found "Long", "Hex" and "Double" lines. Are "Direct Connections" also classified as "Double" lines in FPGA Editor?

 

Thanks.

 




Cheers,
Jim
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surf99
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Registered: ‎03-01-2011

Hi Jim,

 

Thanks for your reply.

 

There are 4 types of interconnect resources listed in Spartan-3 User Guide - Long lines, Hex lines, Double lines and Direct Connections. Direct Connections described there are the routing resources with neighboring CLBs. I can't seem to find them in FPGA Editor for Spartan-3E.

 

www.xilinx.com/support/documentation/user_guides/ug331.pdf

 

Cheers

 

 

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ywu
Xilinx Employee
Xilinx Employee
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Registered: ‎11-28-2007

I see. Those are routing resources that go to ajacent CLBs. They are called OMUX in S3E (see the snapshot shot below). In some device families, they are called Sinlge, which is more clear.

 

ScreenHunter_11.jpg


@surf99 wrote:

Hi Jim,

 

Thanks for your reply.

 

There are 4 types of interconnect resources listed in Spartan-3 User Guide - Long lines, Hex lines, Double lines and Direct Connections. Direct Connections described there are the routing resources with neighboring CLBs. I can't seem to find them in FPGA Editor for Spartan-3E.

 

www.xilinx.com/support/documentation/user_guides/ug331.pdf

 

Cheers

 

 




Cheers,
Jim
surf99
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Registered: ‎03-01-2011

I see. Thanks a lot, Jim.

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pixie_sunky
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Registered: ‎06-05-2009

Hi 

 

Can I ask what about the Direct Connections on Virtex-5 device??  Does it still have the  4 types: Long lines, Hex lines, Double lines and Direct Connections ???  I am quite curious about that.

 

The next question is that   can  clock signal be routed using these 4 tpes of interconnections  instead of global clock networks?? 

 

Many Thanks 

 

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eteam00
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Registered: ‎07-21-2009

Can I ask what about the Direct Connections on Virtex-5 device??  Does it still have the  4 types: Long lines, Hex lines, Double lines and Direct Connections ???  I am quite curious about that.

 

You can always take the FPGA Editor for a spin -- it probably wouldn't take you long to figure out all these details.

 

-- Bob Elkind

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dafeldib
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Registered: ‎06-13-2014

Hi,

 

I hope you can help. I have posted my question on the implementation forum more than one month ago, but got no response.

I want to force the connection between two CLBs to use Double lines, not OMUX. When I force placing the logic in two CLBs with one unused CLB in between ( in the .ucf file) and force the net connecting both to use "uselowskewlines" in the .xcf file this is not enough. When I open FPGA Editor I see the CLB's connected using portions of connections called (Doubles), but through OMUXs, and don't go directly from one CLB to the other. 

 

Best Wishes,

Dalia

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