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198 Views
Registered: ‎08-11-2019

ERROR:Place:1136 - This design contains a global buffer instance

hi, can anyone tellme how to fix this error.

ERROR:Place:1136 - This design contains a global buffer instance,
<RST_N_BUFGP/BUFG>, driving the net, <RST_N_BUFGP>, that is driving the
following (first 30) non-clock load pins.
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_pci2plb_bridge/I_mst_ipifv3_bridge/I
_ipif_mst_req_sm/I_ipif_mst_wrreq_sm/Reset_PCIside_Clear_src_dsc_occurred_OR_
952_o.A1; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_pci2plb_bridge/I_mst_ipifv3_bridge/I
_ipif_mst_req_sm/I_ipif_mst_rdreq_sm/PCI_Prefetch_SM_cs_FSM_FFd2_rstpot.A3; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_pci2plb_bridge/I_mst_ipifv3_bridge/I
_ipif_mst_req_sm/_n01901.A2; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
_slv_ipif2pci_fifo/I_slv_ipif2pci_fifo_cntrl/Wr_ABus_MSB_Reset_Rd_side1.A4; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
nclude_ipif_mst2pci_targ/I_pci_initiator/Reset_PCIside_GND_399_o_OR_336_o1.A1
; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
nclude_ipif_mst2pci_targ/I_pci_initiator/Mmux_PCI_initiator_SM_ns[3]_PWR_86_o
_mux_103_OUT31_G.A3; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
nclude_ipif_mst2pci_targ/I_pci_initiator/Mmux_PCI_initiator_SM_ns[3]_PWR_86_o
_mux_103_OUT31_F.A3; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_pci2plb_bridge/I_mst_ipifv3_bridge/I
_ipif_mst_req_sm/I_ipif_mst_rdreq_sm/discard_count_31_glue_rst.A2; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
nclude_ipif_mst2pci_targ/I_pci_initiator/Only_2_in_FIFO_rstpot.A1; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_pci2plb_bridge/I_mst_ipifv3_bridge/I
_ipif_mst_req_sm/I_ipif_mst_wrreq_sm/Rmt_PCI_init_wr_IPIF_InProg_PCIside_int_
rstpot1.A3; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
_slv_ipif2pci_fifo/I_slv_ipif2pci_fifo_cntrl/Wr_ABus_MSB_Wr_side_D.A3; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
nclude_ipif_mst2pci_targ/I_pci_initiator/Last_wrd_in_FIFO_not_loaded_in_V3cor
e_rstpot.A2; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_pci2plb_bridge/I_mst_ipifv3_bridge/I
_ipif_mst_req_sm/I_ipif_mst_wrreq_sm/Set_srcrdy_sof_eof_cs_glue_set.A1; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
nclude_ipif_mst2pci_targ/I_pci_wr_initiator_pciretry_sm/PCI_Wr_Abort_prompt_i
nt_rstpot.A5; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_pci2plb_bridge/I_mst_ipifv3_bridge/I
_ipif_mst_req_sm/I_ipif_mst_rdreq_sm/PCI_Prefetch_SM_cs_FSM_FFd9_rstpot.A4; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
nclude_ipif_mst2pci_targ/I_pci_addr_counter/IPIF_HIGHADDR_14_rstpot1.A6; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/P
CI2IPIF_FIFO_Reset_PCIside_gtd1.A1; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
nclude_ipif_mst2pci_targ/I_pci_initiator/Reset_PCIside_Clear_IPIF2PCI_FIFO_Re
set_PCIinit_OR_342_o1.A2; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_pci2plb_bridge/I_mst_ipifv3_bridge/I
_ipif_mst_req_sm/I_ipif_mst_rdreq_sm/IP2Bus_MstRd_dst_dsc_n_reg_rstpot.A5; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/PCI_CORE_S6_generate.pci_core_s6/RST1_
INV_0.A6; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
nclude_ipif_mst2pci_targ/I_pci_addr_counter/Pass_Request_rstpot.A3; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
nclude_ipif_mst2pci_targ/I_pci_initiator/PCI_initiator_SM_cs_FSM_FFd1-In42.A1
; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
nclude_ipif_mst2pci_targ/I_pci_initiator/PCI_initiator_SM_cs_FSM_FFd3-In11.A1
; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
nclude_ipif_mst2pci_targ/I_pci_initiator/PCI_initiator_SM_cs<3>1_SW3.A1; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
nclude_ipif_mst2pci_targ/I_pci_initiator/PCI_initiator_SM_cs<3>1_SW0.A1; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
nclude_ipif_mst2pci_targ/I_pci_initiator/PCI_initiator_SM_cs<3>1_SW1.A1; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
nclude_ipif_mst2pci_targ/I_pci_initiator/PCI_initiator_SM_cs<3>1_SW2.A1; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_pci2plb_bridge/I_mst_ipifv3_bridge/I
_ipif_mst_req_sm/I_ipif_mst_rdreq_sm/s_Bus2IP_MstRd_eof_n_occurred_rstpot.A3;
>
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
_slv_ipif2pci_fifo/I_slv_ipif2pci_fifo_cntrl/Wr_ABus_MSB_Wr_side_G.A6; >
< PIN:
Inst_edk_pci/plbv46_pci_0/plbv46_pci_0/I_plb2pci_bridge/I_slv_ipifv3_bridge/I
nclude_ipif_mst2pci_targ/I_pci_initiator/Reset_PCIside_GND_399_o_OR_345_o1_SW
0.A6; >This is not a recommended design practice in Spartan-6 due to
limitations in the global routing that may cause excessive delay, skew or
unroutable situations. It is recommended to only use a BUFG resource to
drive clock loads. If you wish to override this recommendation, you may use
the CLOCK_DEDICATED_ROUTE constraint (given below) in the .ucf file to demote
this message to a WARNING and allow your design to continue.
< PIN "RST_N_BUFGP/BUFG.O" CLOCK_DEDICATED_ROUTE = FALSE; >


ERROR:Pack:1654 - The timing-driven placement phase encountered an error.

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9 Replies
Scholar drjohnsmith
Scholar
197 Views
Registered: ‎07-09-2009

Re: ERROR:Place:1136 - This design contains a global buffer instance

This is not a recommended design practice in Spartan-6 due to
limitations in the global routing that may cause excessive delay, skew or
unroutable situations.

It is recommended to only use a BUFG resource to
drive clock loads.

If you wish to override this recommendation, you may use
the CLOCK_DEDICATED_ROUTE constraint (given below) in the .ucf file to demote
this message to a WARNING and allow your design to continue.


< PIN "RST_N_BUFGP/BUFG.O" CLOCK_DEDICATED_ROUTE = FALSE; >

 

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179 Views
Registered: ‎08-11-2019

Re: ERROR:Place:1136 - This design contains a global buffer instance

I have used this comment < PIN "RST_N_BUFGP/BUFG.O" CLOCK_DEDICATED_ROUTE = FALSE; > in .ucf file then it is coming different error like net not found in design

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Scholar drjohnsmith
Scholar
144 Views
Registered: ‎07-09-2009

Re: ERROR:Place:1136 - This design contains a global buffer instance

try it again please, and show us the results, and your ucf file.

 

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121 Views
Registered: ‎08-11-2019

Re: ERROR:Place:1136 - This design contains a global buffer instance

please help me how to fix this errors

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110 Views
Registered: ‎08-11-2019

Re: ERROR:Place:1136 - This design contains a global buffer instance

ok i used this comment again it came error as

ERROR:Place:1108 - A clock IOB / BUFGMUX clock component pair have been found
that are not placed at an optimal clock IOB / BUFGMUX site pair. The clock
IOB component <RST_N> is placed at site <D3>. The corresponding BUFG
component <RST_N_BUFGP/BUFG> is placed at site <BUFGMUX_X3Y8>. There is only
a select set of IOBs that can use the fast path to the Clocker buffer, and
they are not being used. You may want to analyze why this problem exists and
correct it. If this sub optimal condition is acceptable for this design, you
may use the CLOCK_DEDICATED_ROUTE constraint in the .ucf file to demote this
message to a WARNING and allow your design to continue. However, the use of
this override is highly discouraged as it may lead to very poor timing
results. It is recommended that this error condition be corrected in the
design. A list of all the COMP.PINs used in this clock placement rule is
listed below. These examples can be used directly in the .ucf file to
ERROR:Pack:1654 - The timing-driven placement phase encountered an error.

error2.PNG
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Scholar drjohnsmith
Scholar
90 Views
Registered: ‎07-09-2009

Re: ERROR:Place:1136 - This design contains a global buffer instance

get rid of the \BUFG.O part of the command.

 

I might ask, the use of a BUFG and a none optimum pin is an oxcimorion.

 

One uses a bufg for speed, with its associated pin, using a none optimum pin slows the timming significanlty.

just get rid of the BUFG in the design would seme to have the same effect.

 

 

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Highlighted
79 Views
Registered: ‎08-11-2019

Re: ERROR:Place:1136 - This design contains a global buffer instance

ok thank you sir, can you please tell me how to get rid of BUFG

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Scholar drjohnsmith
Scholar
67 Views
Registered: ‎07-09-2009

Re: ERROR:Place:1136 - This design contains a global buffer instance

have you tried the command I mentioned above ?
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45 Views
Registered: ‎08-11-2019

Re: ERROR:Place:1136 - This design contains a global buffer instance

yes but problem not solved

can anyone tell me RST_N pin is compulsory for pci transaction

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