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8,332 Views
Registered: ‎09-03-2013

FATAL_ERROR:Pack:pksbarouter.c:146:1.20 ISE 14.5 Map Issue.

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Hi,

 

I m trying to generate a bitfile for Kintex 7 fpga with ise 14.5. During the MAP process i received the below error.

I searched in the forum if anyone has faced the same error but i found nothing. Some said to disable -logic_opt but it didn't help.

 

Please help me. the error message is posted below.

 

Sites:
Name: INBUF_DCIEN
Site Input Pins:
Pin Name: IN
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Pin Name: DIFFI_IN
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Pin Name: IBUFDISABLE
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Site Output Pins:
Pin Name: OUT
Base Cost: 4
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Name: DCITERMDISABLE
Index: 9
Site Input Pins:
Site Output Pins:
Pin Name: DCITERMDISABLE
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Name: DCITERMDISABLE_GND
Site Input Pins:
Site Output Pins:
Pin Name: 0
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Name: DCITERMDISABLE_SEL
Routing Mux
Site Input Pins:
Pin Name: GND
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Pin Name: I
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Site Output Pins:
Pin Name: OUT
Base Cost: 3
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wire Fanin: 2
Name: IBUFDISABLE
Index: 8
Site Input Pins:
Site Output Pins:
Pin Name: IBUFDISABLE
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Name: IBUFDISABLE_GND
Site Input Pins:
Site Output Pins:
Pin Name: 0
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Name: IBUFDISABLE_SEL
Routing Mux
Site Input Pins:
Pin Name: GND
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Pin Name: I
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Site Output Pins:
Pin Name: OUT
Base Cost: 3
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wire Fanin: 2
Name: DIFF_TERM
Site Input Pins:
Site Output Pins:
Name: IBUF_LOW_PWR
Site Input Pins:
Site Output Pins:
Name: DIFFI_IN
Index: 4
Site Input Pins:
Site Output Pins:
Pin Name: DIFFI_IN
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Name: DIFFI_INUSED
Routing Mux
Site Input Pins:
Pin Name: 0
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Site Output Pins:
Pin Name: OUT
Base Cost: 2
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wire Fanin: 1
Name: IUSED
Routing Mux
Site Input Pins:
Pin Name: 0
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Site Output Pins:
Pin Name: OUT
Base Cost: 2
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wire Fanin: 1
Name: TUSED
Routing Mux
Site Input Pins:
Pin Name: 0
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Site Output Pins:
Pin Name: OUT
Base Cost: 2
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wire Fanin: 1
Name: OUSED
Routing Mux
Site Input Pins:
Pin Name: 0
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Site Output Pins:
Pin Name: OUT
Base Cost: 2
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wire Fanin: 1
Name: I
Index: 2
Site Input Pins:
Pin Name: I
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Site Output Pins:
Name: T
Index: 1
Site Input Pins:
Site Output Pins:
Pin Name: T
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Name: O
Index: 0
Site Input Pins:
Site Output Pins:
Pin Name: O
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Name: OUTBUF_DCIEN
Index: 0
Site Input Pins:
Pin Name: IN
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Pin Name: EN
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Pin Name: DCITERMDISABLE
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Site Output Pins:
Pin Name: OUT
Base Cost: 4
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Name: PADOUT
Index: 3
Site Input Pins:
Pin Name: PADOUT
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Site Output Pins:
Name: DIFFO_IN
Index: 5
Site Input Pins:
Site Output Pins:
Pin Name: DIFFO_IN
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Name: DIFFO_OUT
Index: 6
Site Input Pins:
Pin Name: DIFFO_OUT
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Site Output Pins:
Name: DELAY_SELECT
Site Input Pins:
Site Output Pins:
Name: DISABLE_GTS
Site Input Pins:
Site Output Pins:
Name: PAD
Frag: system_i/io_axi_7series_ddrx_1_ddr_dqs_n<0>
Index: 0
Site Input Pins:
Pin Name: PAD
Base Cost: 2
Path Cost: 0
Pin Type: BIDIR
Wire Fanout: 1
Wire Fanin: 1
Site Output Pins:
Pin Name: PAD
Base Cost: 2
Path Cost: 0
Pin Type: BIDIR
Wire Fanout: 1
Wire Fanin: 1
Name: PULL
Index: 0
Site Input Pins:
Site Output Pins:
Pin Name: PAD
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Name: PULLTYPE
Site Input Pins:
Site Output Pins:
Name: PADOUTUSED
Frag: system_i/axi_7series_ddrx_1/axi_7series_ddrx_1/u_memc_ui_top_axi/mem_intfc0/ddr_phy_top0/u_ddr_mc_phy_wrapper/gen_dqs_iobuf_HP.gen_dqs_iobuf[0].gen_dqs_diff.u_iobuf_dqs/IBUFDS_IBUFDISABLE/DCISLAVEBUF.DIFFIN
Site Input Pins:
Pin Name: IN
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Site Output Pins:
Pin Name: OUT
Base Cost: 2
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Pins:
Pin Name: IN
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Pin Name: DIFFI_IN
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Pin Name: IBUFDISABLE
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Pin Name: OUT
Base Cost: 4
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Pin Name: DCITERMDISABLE
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Pin Name: 0
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Pin Name: GND
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Pin Name: I
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Pin Name: OUT
Base Cost: 3
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wire Fanin: 2
Pin Name: IBUFDISABLE
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Pin Name: 0
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Pin Name: GND
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Pin Name: I
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Pin Name: OUT
Base Cost: 3
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wire Fanin: 2
Pin Name: DIFFI_IN
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Pin Name: 0
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Pin Name: OUT
Base Cost: 2
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wire Fanin: 1
Pin Name: 0
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Pin Name: OUT
Base Cost: 2
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wire Fanin: 1
Pin Name: 0
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Pin Name: OUT
Base Cost: 2
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wire Fanin: 1
Pin Name: 0
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Pin Name: OUT
Base Cost: 2
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wire Fanin: 1
Pin Name: I
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Pin Name: T
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Pin Name: O
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Pin Name: IN
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Pin Name: EN
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Pin Name: DCITERMDISABLE
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Pin Name: OUT
Base Cost: 4
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Pin Name: PADOUT
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Pin Name: DIFFO_IN
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Pin Name: DIFFO_OUT
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Pin Name: PAD
Base Cost: 2
Path Cost: 0
Pin Type: BIDIR
Wire Fanout: 1
Wire Fanin: 1
Pin Name: PAD
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Pin Name: IN
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Pin Name: OUT
Base Cost: 2
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wires:
Wire Name: INBUF_DCIEN_OUT
Base Cost: 1
Path Cost: 0
Driver:
Pin Name: OUT
Base Cost: 4
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Load:
Pin Name: 0
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Wire Name: IUSED_OUT
Base Cost: 1
Path Cost: 0
Driver:
Pin Name: OUT
Base Cost: 2
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wire Fanin: 1
Load:
Pin Name: I
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Wire Name: DIFFI_IN_DIFFI_IN
Base Cost: 1
Path Cost: 0
Driver:
Pin Name: DIFFI_IN
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Load:
Pin Name: 0
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Wire Name: DIFFI_INUSED_OUT
Base Cost: 1
Path Cost: 0
Driver:
Pin Name: OUT
Base Cost: 2
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wire Fanin: 1
Load:
Pin Name: DIFFI_IN
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Wire Name: TUSED_OUT
Base Cost: 1
Path Cost: 0
Driver:
Pin Name: OUT
Base Cost: 2
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wire Fanin: 1
Load:
Pin Name: EN
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Wire Name: OUSED_OUT
Base Cost: 1
Path Cost: 0
Driver:
Pin Name: OUT
Base Cost: 2
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wire Fanin: 1
Load:
Pin Name: IN
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Wire Name: T_T
Base Cost: 1
Path Cost: 0
Driver:
Pin Name: T
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Load:
Pin Name: 0
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Wire Name: O_O
Base Cost: 1
Path Cost: 0
Driver:
Pin Name: O
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Load:
Pin Name: 0
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Wire Name: OUTBUF_DCIEN_OUT
Base Cost: 1
Path Cost: 0
Driver:
Pin Name: OUT
Base Cost: 4
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Driver:
Pin Name: PAD
Base Cost: 2
Path Cost: 0
Pin Type: BIDIR
Wire Fanout: 1
Wire Fanin: 1
Driver:
Pin Name: PAD
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Load:
Pin Name: IN
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Load:
Pin Name: PAD
Base Cost: 2
Path Cost: 0
Pin Type: BIDIR
Wire Fanout: 1
Wire Fanin: 1
Load:
Pin Name: IN
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Wire Name: IBUFDISABLE_IBUFDISABLE
Base Cost: 1
Path Cost: 0
Driver:
Pin Name: IBUFDISABLE
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Load:
Pin Name: I
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Wire Name: IBUFDISABLE_SEL_OUT
Base Cost: 1
Path Cost: 0
Driver:
Pin Name: OUT
Base Cost: 3
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wire Fanin: 2
Load:
Pin Name: IBUFDISABLE
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Wire Name: DCITERMDISABLE_DCITERMDISABLE
Base Cost: 1
Path Cost: 0
Driver:
Pin Name: DCITERMDISABLE
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Load:
Pin Name: I
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Wire Name: DCITERMDISABLE_SEL_OUT
Base Cost: 1
Path Cost: 0
Driver:
Pin Name: OUT
Base Cost: 3
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Wire Fanin: 2
Load:
Pin Name: DCITERMDISABLE
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Wire Name: PADOUTUSED_OUT
Base Cost: 1
Path Cost: 0
Driver:
Pin Name: OUT
Base Cost: 2
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Load:
Pin Name: PADOUT
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanin: 1
Wire Name: IBUFDISABLE_GND_0
Base Cost: 1
Path Cost: 0
Driver:
Pin Name: 0
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Load:
Pin Name: GND
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Wire Name: DCITERMDISABLE_GND_0
Base Cost: 1
Path Cost: 0
Driver:
Pin Name: 0
Base Cost: 1
Path Cost: 0
Pin Type: OUT
Wire Fanout: 1
Load:
Pin Name: GND
Base Cost: 0
Path Cost: 0
Pin Type: IN
Wire Fanout: 1
Wire Fanin: 1
Bel Plan to Pin Location Map:
FATAL_ERROR:Pack:pksbarouter.c:146:1.20 - Failed to find a site named
DIFFO_INUSED in the routing graph. For technical support on this issue,
please visit http://www.xilinx.com/support.

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1 Solution

Accepted Solutions
Community Manager
Community Manager
12,920 Views
Registered: ‎06-14-2012

Re: FATAL_ERROR:Pack:pksbarouter.c:146:1.20 ISE 14.5 Map Issue.

Jump to solution

Thanks for the update. There was an issue reported earlier.

 

In this case the problem was caused with bi-directional usage with IBUFGDS_DIFF_OUT on the input side and OBUFDS on the output side. There was no I/O standard specified here. Without the standard, the tool chose LVDS_25 as the default standard and true differential usage expansion. This is an unsupported connectivity and thus the packer fatal error. LVDS_25 doesn’t support bi-directional usage. With bi-directional connection, we need to select the standard that supports bi-directional usage. All standards that support bi-directional usage are pseudo differential standard in Spartan-6.

 

Using the bi-directional standard resolved this issue.

 

Can you check on this front? 

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6 Replies
Community Manager
Community Manager
8,329 Views
Registered: ‎06-14-2012

Re: FATAL_ERROR:Pack:pksbarouter.c:146:1.20 ISE 14.5 Map Issue.

Jump to solution

Fatal errors are bug and usually occurs when tool is unable to handle a specific scenario.

Is it possible for you to test this design in 14.6?

 

If you would be interested to share your design, Please let me know.

I can send you the ezmove link

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Community Manager
Community Manager
8,326 Views
Registered: ‎06-14-2012

Re: FATAL_ERROR:Pack:pksbarouter.c:146:1.20 ISE 14.5 Map Issue.

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Also try removing the DIFFO_INUSED constraint from your source file. This seems to be creating an issue here

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8,325 Views
Registered: ‎09-03-2013

Re: FATAL_ERROR:Pack:pksbarouter.c:146:1.20 ISE 14.5 Map Issue.

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I would try this in 14.6 but i have instantiated the EDK inside ise.

If i try to migrate the design EDK will give lots of error related to IP version.

I dont want to go in that direction.

 

What is the actual problem here?

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8,324 Views
Registered: ‎09-03-2013

Re: FATAL_ERROR:Pack:pksbarouter.c:146:1.20 ISE 14.5 Map Issue.

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i have not given any constraint like DIFFO_INUSED.

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Community Manager
Community Manager
12,921 Views
Registered: ‎06-14-2012

Re: FATAL_ERROR:Pack:pksbarouter.c:146:1.20 ISE 14.5 Map Issue.

Jump to solution

Thanks for the update. There was an issue reported earlier.

 

In this case the problem was caused with bi-directional usage with IBUFGDS_DIFF_OUT on the input side and OBUFDS on the output side. There was no I/O standard specified here. Without the standard, the tool chose LVDS_25 as the default standard and true differential usage expansion. This is an unsupported connectivity and thus the packer fatal error. LVDS_25 doesn’t support bi-directional usage. With bi-directional connection, we need to select the standard that supports bi-directional usage. All standards that support bi-directional usage are pseudo differential standard in Spartan-6.

 

Using the bi-directional standard resolved this issue.

 

Can you check on this front? 

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8,308 Views
Registered: ‎09-03-2013

Re: FATAL_ERROR:Pack:pksbarouter.c:146:1.20 ISE 14.5 Map Issue.

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In the .ucf i changed the IOSTANDARD of the perticular differential pin to diff_sstl15 and the error got solved.

 

 thanks :)

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