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eldrick

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01-12-2019 03:39 PM

631 Views

Registered:
07-24-2018

Currently trying to implement 16 512-tap long FIR filters on a ZU9EG device. Each device uses 128 DSP slices (decimate by 4).

The ZU9EG has 2520 DSP slices available and I should be utilizing 2048 of them. However, I fail synthesis during Floorplanning and receive the error I've attached below.

What exactly is the limit to the # of consecutive DSP slices/macros that can be used in the ZU9EG? Is there a way I can configure my FIRs to increase my utilization?

Phase 2.1 Floorplanning Phase 2.1 Floorplanning | Checksum: 186c9ff7b Time (s): cpu = 00:14:59 ; elapsed = 00:07:27 . Memory (MB): peak = 9802.258 ; gain = 0.000 ; free physical = 1702 ; free virtual = 73099 ERROR: [Place 30-365] The following macros could not be placed: [proj]/fir_compiler_1/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_parallel.g_paths[0].g_non_symmetric.g_madds[0].i_madd/i_addsub_mult_add/g_dsp48.g_dsp48e2.i_dsp48e2/DSP_ALU_INST (DSP_ALU) [proj[/fir_compiler_10/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_parallel.g_paths[0].g_non_symmetric.g_madds[0].i_madd/i_addsub_mult_add/g_dsp48.g_dsp48e2.i_dsp48e2/DSP_ALU_INST (DSP_ALU) [proj]/fir_compiler_15/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_parallel.g_paths[0].g_non_symmetric.g_madds[0].i_madd/i_addsub_mult_add/g_dsp48.g_dsp48e2.i_dsp48e2/DSP_ALU_INST (DSP_ALU) [proj]/fir_compiler_3/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_parallel.g_paths[0].g_non_symmetric.g_madds[0].i_madd/i_addsub_mult_add/g_dsp48.g_dsp48e2.i_dsp48e2/DSP_ALU_INST (DSP_ALU) [proj]/fir_compiler_6/U0/i_synth/g_polyphase_decimation.i_polyphase_decimation/g_parallel.g_paths[0].g_non_symmetric.g_madds[0].i_madd/i_addsub_mult_add/g_dsp48.g_dsp48e2.i_dsp48e2/DSP_ALU_INST (DSP_ALU) The total BRAM utilization is 26.04, the total DSP utilization is 650.2 and the total URAM utilization is 0 A possible reason is high utilization of BRAMs, DSPs, URAMs, or RPMs. Please check user constraints to make sure design is not over-utilized in the constraint areas (if any) keeping in mind some macros require a number of consecutively available sites

1 Solution

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Resolved: You'll have to explicitly divide up your DSP slice columns into a custom configuration. In my case, dividing 128 slices into 4 columns of 32 worked. The synthesis tools, even under "Automatic" multi-column support mode, will not divide up your slices such that they will all fit consecutively.

eldrick

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01-13-2019 03:08 PM

566 Views

Registered:
07-24-2018

1 Reply

Highlighted
Resolved: You'll have to explicitly divide up your DSP slice columns into a custom configuration. In my case, dividing 128 slices into 4 columns of 32 worked. The synthesis tools, even under "Automatic" multi-column support mode, will not divide up your slices such that they will all fit consecutively.

eldrick

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01-13-2019 03:08 PM

567 Views

Registered:
07-24-2018