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arash9k
Adventurer
Adventurer
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Registered: ‎02-12-2013

How to completely remove ILA from Vivado project?

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Hi,

 

I had a few nets connected to a debug port initially but then I decided to get rid of the debug ports. So I removed the ILA instance from the project and also manually removed all the (* mark_debug = "true" *) s next to the nets that were being debugged. Now, I get the warning mentioned in the title which leads to an error in implementation. How can I completely remove anything to do with ILA and debug from my project so that I don't get this warning?

 

Thanks,

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arash9k
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Registered: ‎02-12-2013

I just added a new ILA to my project, then marked a net for debug. I then chose "Set up debug..." and chose "remove existing cores". When I implemented after that, I did't see the error anymore. Then I removed the ILA by right-clicking it an choosing "remove file from project". After that, I deleted whatever was added to the XDC file by the ILA. Then I resynthesized and implemented. Everything is working now. This is essentially what I did the first time, but I guess somehow some ILA files/settings did had not gotten deleted completely.

 

EDIT: The best way to remove unwanted debug cores is: first use the "report_debug_core" tcl command to see if there are any cores in the design, then use the "delete_debug_core" command to remove them.

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graces
Moderator
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Registered: ‎07-16-2008

I'll move the thread to Implementation board since it's an implementatin error.

 

How did you remove the ILA instance? Did you use HDL instantiation or Netlist insertion flow to add the ILA core?

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arash9k
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Registered: ‎02-12-2013
I removed the ILA by right-clicking the ILA instance in the Project Manager window under Hierarchy tab then choosing Remove from project. Then I manually removed all the (* mark_debug = "true" *) s in the code.
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arash9k
Adventurer
Adventurer
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Registered: ‎02-12-2013

After playing around with it a little bit, now I don't get the synthesis warning anymore but I still get this implementation error:

 

"There are unconnected channels on debug port 'u_ila_0/PROBE0'. This may cause errors during implementation.

 

I don't know where else to get rid of the debug ports. How can I completely remove the everything to do with ILA?

 

 

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arash9k
Adventurer
Adventurer
18,200 Views
Registered: ‎02-12-2013

I just added a new ILA to my project, then marked a net for debug. I then chose "Set up debug..." and chose "remove existing cores". When I implemented after that, I did't see the error anymore. Then I removed the ILA by right-clicking it an choosing "remove file from project". After that, I deleted whatever was added to the XDC file by the ILA. Then I resynthesized and implemented. Everything is working now. This is essentially what I did the first time, but I guess somehow some ILA files/settings did had not gotten deleted completely.

 

EDIT: The best way to remove unwanted debug cores is: first use the "report_debug_core" tcl command to see if there are any cores in the design, then use the "delete_debug_core" command to remove them.

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arash9k
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Registered: ‎02-12-2013

Yet again, when I programmed the FPGA with the bitstream generated, I can see the ILA core under my hardware. So I guess the question is:

 

What is the proper way to remove an ILA instance from a project?

 

In UG908 page 23 it says in order to delete debug core, right-click then delete. But in my case, "delete" is inactive.

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graces
Moderator
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Registered: ‎07-16-2008

You need to open Synthesized Design, find the ILA in Debug window and delete it.

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bobsagusti
Visitor
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Registered: ‎09-03-2013

How do you delete the ILAfrom the netlist. I have the same problem here except in PlanAhead 14.4. The netlist shows two instances of ILA's. Every time I try implementation, it fails on "unconnected channels on debug port"

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graces
Moderator
Moderator
13,493 Views
Registered: ‎07-16-2008

Please refer to http://forums.xilinx.com/t5/Design-Planning/ChipScope-ILA-2-0-Vivado-2013-2-Deleted-Debug-Probes-Persist/m-p/353885#M1772.

 

You can open synthesized (netlist) design, and either run "delete_debug_core" Tcl command or

select the ILA core in Debug window and do Delete from pop-up menu.

 

debug_core.png

 

The  "unconnected channels on debug port" indicates that you have CLK or PROBE port unconnected.

e.g. you define a 2-bit PROBE0 port, but only connected PROBE0(0) and left PROBE0(1) unconnected.

In this case, you can do "Remove Unconnected Debug Ports and Channels" from the menu.

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If starting with Versal take a look at our Versal Design Process Hub and our Versal Blogs.
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flyinpig
Newbie
Newbie
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Registered: ‎10-30-2019

You might also need to go into the Hardware Manager and Configuration Memory Device Properties and empty the Probes File box.

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