03-25-2021 09:35 AM
I marked many signals as debug. Then implementation failed with the following error:
From the error message I could not tell which debug signal caused it? Does any one has a way to figure it out? I have too many debug signals to try out one at a time.
03-25-2021 08:27 PM
Please try to check the opt netlist for the reported LUT connection without sweep stage in opt_design.
Ex: opt_design -retarget -propconst
03-25-2021 09:09 PM
03-26-2021 08:11 AM
You can open the opt.dcp and check the connection in the schematic of the reported lut:
select_object [get_cells XX]
click the input pin of the LUT in the schematic.
03-26-2021 09:15 AM
03-28-2021 11:06 PM
You can use the below methods to open the design checkpoint file:
1. In TCL CONSOLE, execute the command: "open_checkpoint XX_opt.dcp"
2 File -> Checkpoint -> Open (XX_opt.dcp)
04-06-2021 11:45 AM
Hi Hong, I
opened my_top_module_opt.dcp. Then clicked ila_core_inst to open the schematic of the ila core. I see all the nets are shown as hidden. Anything am I not doing right? Thanks.