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Visitor
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Registered: ‎03-18-2020

IO Site Resource Locations on Virtex Ultrascale (xcvu095-ffva2104-2-e)

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Hi all,

    Recently, I am dealing with research on placement based on Vivado and I am confused by the IO site resource of  Virtex Ultrascale (xcvu095-ffva2104-2-e).

    In ISPD 2016 contest, Xilinx provided the information for the device, in which there are some IO sites in adjacent columns, as part of the deisgn.scl file shown below:

Screenshot from 2020-09-07 08-14-21.png

    However, when I check in Vivado device view, near that region, it seems that there is just one column for IO sites, as shown below.  I think just those sites with IO pad are IO sites. Do I misunderstand something?

Screenshot from 2020-09-07 08-04-09.png

 

    Thanks in advance for your suggestions!!!! ^_^/

 

Best regards,

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Moderator
Moderator
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Registered: ‎04-24-2013

Hi @zslwhkyuan

The numbers 66 and 67 are the IO bank numbers. You can see where they are and whats pins are contained in them by looking at the Package or Device views. THe simplest way to do this is to create an empty IO Pin Planning project for the device you are targeting.

Here are two views of the same two banks 66 & 67

Capture.JPGCapture1.JPG

 

Best Regards
Aidan

 

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Registered: ‎04-24-2013

HI @zslwhkyuan 

They are some of the IO sites and there are two rows of them on that device.

Capture.JPG

I've highlighted them in Yellow in this picture.

Best Regards
Aidan

 

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Visitor
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Registered: ‎03-18-2020

Hi @amaccre ,

 

    Thanks a lot for your prompt reply!

    Yes, it looks there are two columns of IO sites in the middle of the device. However, the information from the benchmark ISPD released by Xilinx shows that there are two adjacent columns of IO sites, like the 66th/67th columns.

    Thanks again!

 

Best regards,

 

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Highlighted
Moderator
Moderator
54 Views
Registered: ‎04-24-2013

Hi @zslwhkyuan

The numbers 66 and 67 are the IO bank numbers. You can see where they are and whats pins are contained in them by looking at the Package or Device views. THe simplest way to do this is to create an empty IO Pin Planning project for the device you are targeting.

Here are two views of the same two banks 66 & 67

Capture.JPGCapture1.JPG

 

Best Regards
Aidan

 

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Give Kudos to a post which you think is helpful and may help other users
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