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Visitor
Visitor
6,306 Views
Registered: ‎02-17-2009

IOBUF removed

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Hi!

 

When running boundary scan test on a board with a Xilinx FPGA I want an IO pin to be defined as input/output pin. I have tried to used the IOBUF but it is removed during the MAP process. I have also tried to use the KEEP constraint on the 3-state enable signal but it is still removed. How could this be done?

 

Output from Map process:

 

The signal "enable" is unused and has been removed.
 Unused block "XST_VCC" (ONE) removed.
Unused block "IOBUF_inst/OBUFT" (TRI) removed.

 

The code looks like this:

 

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
library UNISIM;
use UNISIM.VComponents.all;

entity top_level is
    Port ( in_clk : inout  STD_LOGIC;
              out_clk : out STD_LOGIC);            
end top_level;

architecture Behavioral of top_level is
signal enable : STD_LOGIC;
attribute keep : string;
attribute keep of enable: signal is "TRUE";


begin  
    IOBUF_inst : IOBUF
    port map (
        O => out_clk, -- Buffer output
        IO => in_clk, -- Buffer inout port (connect directly to top-level port)
        I => '1', -- Buffer input
        T =>  enable -- 3-state enable input
    );   
   enable <= '1';

end Behavioral;

 

 

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Xilinx Employee
Xilinx Employee
7,139 Views
Registered: ‎08-02-2007

please try to add save flag "s"

in the ucf for in the code

 

please see Constrant guide for detailed info

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Highlighted
Xilinx Employee
Xilinx Employee
7,140 Views
Registered: ‎08-02-2007

please try to add save flag "s"

in the ucf for in the code

 

please see Constrant guide for detailed info

------------------------------------------------------------------------------
Don't forget to reply, give kudo and accept as solution
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Highlighted
Visitor
Visitor
6,255 Views
Registered: ‎02-17-2009

Thanks for your reply. I can't understand now how I could miss that constraint.

 

 

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