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Visitor sharathm@535
Visitor
381 Views
Registered: ‎08-20-2018

Implementation fails during optimization

Hello,

I'm getting the following messages when I try to run the implementation process. 

  • Implementation
  • Opt Design
  • [Vivado 12-5447] synth_ip is not supported in project mode, please use non-project mode.
  • [Chipscope 16-301] Could not generate core for dbg_hub .Aborting IP Generation operation. ERROR: [Chipscope 16-218] An error occurred while trying to create or get a cached instance from the IP cache manager: "IP generation failed. "
  • [Chipscope 16-307] Implementing debug core dbg_hub failed due to earlier errors.

This is solved when I remove all the debug cores. But when I try to implement the same project with debug core in my another system with the same version of Vivado 2017.2, it is working fine without any error messages as above. Can anyone help me out with this problem and give me a solution?

 

Thanks & Regards

Sharath

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7 Replies
Xilinx Employee
Xilinx Employee
345 Views
Registered: ‎05-08-2012

Re: Implementation fails during optimization

Hi sharathm@535.

Is a script used? The message suggests that you are mixing project-mode commands with non-project mode commands. These are generally incompatible. The following Guide might help.

http://www.xilinx.com/support/documentation/sw_manuals/xilinx2018_3/ug892-vivado-design-flows-overview.pdf


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Visitor sharathm@535
Visitor
298 Views
Registered: ‎08-20-2018

Re: Implementation fails during optimization

Hello marcb,

I'm not using script to launch any of the process. Initially, I used to get the error stating that Synthesis failed with zero warnings and errors. When I launched synthesis again after resetting the synthesis in design runs, synthesis got completed successfully. This cycle is repeated very often and the main problem as described earlier is not solved even after trying to rest the implementation multiple times. I even uninstalled the application and reinstalled again, but still the problem persists.

 

Regards

Sharath

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Xilinx Employee
Xilinx Employee
280 Views
Registered: ‎05-08-2012

Re: Implementation fails during optimization

Hi sharathm@535.

Does removing the IP cache help?

config_ip_cache -remove [get_ips dbg_hub]

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Visitor sharathm@535
Visitor
270 Views
Registered: ‎08-20-2018

Re: Implementation fails during optimization

No, I tried even that. It didn't solve the problem.

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Moderator
Moderator
267 Views
Registered: ‎01-16-2013

Re: Implementation fails during optimization

sharathm@535

This is solved when I remove all the debug cores. But when I try to implement the same project with debug core in my another system with the same version of Vivado 2017.2, it is working fine without any error messages as above

 

Can you try reset and regenerate the output products of the IPs. Also compare the working and not working project to find any debug information.

 

--Syed

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Visitor sharathm@535
Visitor
247 Views
Registered: ‎08-20-2018

Re: Implementation fails during optimization

Sure, will try that.

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Visitor sharathm@535
Visitor
187 Views
Registered: ‎08-20-2018

Re: Implementation fails during optimization

After resetting the cores, all the cores could be regenerated except for the VIO. Can you please tell me how to proceed further in debugging this issue?

 

Regards

Sharath

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