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Observer
Observer
612 Views
Registered: ‎11-15-2019

Implementation removes FDRE data input - Error: FDRE data pin undriven

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Hello everybody,

I have a strange problem, which I see for the first time and do not understand.

I have designed a "typical" DSP FIR filter. The input signal is loaded into a register. From there some coefficient multiplications are processed using the Shift-Add algorithm.

The synthesis is error-free, the behavioral simulation works perfectly...
If I run an implementation only for the VHDL file of the filter, I have no errors.

But if I put the filter into my whole system (in the block design with DAC, ADC, etc.) and run the implementation or generate bitstream, the compiler obviously removes the data input of my registers at the filter input and gives me the critical warning:

"Found a FDRE that its data pin is undriven. Driver is required to prevent unexpected behavior".

Indeed, I only get garbage at the filter output if I ignore the error message and implement the filter anyway.

Why does the compiler remove my register inputs? The synthesis is error-free, the assignment of my register in the code should be correct. Also I don't get this warning if I compile only the VHDL code of the filter. Furthermore I have already implemented other filters with this structure without problems (the first process to load the register is identical for example). 

Do you have any suggestions? Is there a way to understand the decision of the compiler?
The VHDL filter file is included to this post.

With kind regards
Patrick

 

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Accepted Solutions
Observer
Observer
558 Views
Registered: ‎11-15-2019

Hi all,

Found the issue on myself...
One DSP block before this filter was a logical errors, so that the DSP output was not connected (n/c).
The compiler has noticed that no input is delivered to my filter and has therefore not connected the register flipflops in the optimization step.

View solution in original post

2 Replies
Observer
Observer
559 Views
Registered: ‎11-15-2019

Hi all,

Found the issue on myself...
One DSP block before this filter was a logical errors, so that the DSP output was not connected (n/c).
The compiler has noticed that no input is delivered to my filter and has therefore not connected the register flipflops in the optimization step.

View solution in original post

Moderator
Moderator
458 Views
Registered: ‎01-16-2013

@patrickmatalla 

 

Can you close this thread by marking your above post as "Accept as solution"

 

--Syed

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