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bthfpgaboy
Observer
Observer
8,729 Views
Registered: ‎05-03-2012

Modules removed after PAR

In my project, there are some modules. They are not optimized after synthesization, but some modules are removed after PAR. In additon, if I insert a cdc file, these modules are not optimized. Is this because of the settings of ISE or my code? What should i do to avoid this?

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2 Replies
vemulad
Xilinx Employee
Xilinx Employee
8,726 Views
Registered: ‎09-20-2012

Hi,

 

Check this article http://www.xilinx.com/support/answers/23990.html

 

Thanks,

Deepika.

Thanks,
Deepika.
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pulim
Xilinx Employee
Xilinx Employee
8,725 Views
Registered: ‎02-16-2014

Hi,

 

During implementation without cdc file do you see any warnings indicating the modules are getting optimized?

Please attach the synthesis and implementation log files here?

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