I am using Xilinx 10.1 and Virtex-5. While attempting a MAP, I got the following error:
ERROR:MapLib:711 - A Modular Design has been detected. Map has detected an expanded block control_inst/XST_GND that is not a Module with AREA_GROUP static. This is not a recommended practice. Please refer to the Modular
Design chapter in the Development System Reference Guide for more information.
I read in an earlier post that PR is not supported on Xilinx 10.1. But that post is a few months old. I wonder if there has been any change in that? Or do I have to move to 9.2 for implementing PR?