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Explorer
Explorer
6,206 Views
Registered: ‎10-29-2008

PULLUP pins in XPS UCF without NET

I am using ISE/EDK 14.2 with a Spartan-6.

 

I have some pins in my design that need to be pulled (i.e. output a '1') or pulled down (i.e. output a '0').

 

The are related to an external chip.  I want to set the pull up or down without having to actually having to give them a NET name etc.

 

Is this possible?

 

Somehting like

 

LOC = "R13" | PULLUP;

 

If not is there a way to create an External Port and set it to a '1' or '0' without connecting it to a core?

 

Thanks.

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7 Replies
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Instructor
Instructor
6,204 Views
Registered: ‎07-21-2009

Re: PULLUP pins in XPS UCF without NET

What is the problem with generating a signal name for the pin?  This provides readability and this reserves the pin so that no other IO signal will be assigned to this same package pin.

 

-- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
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Highlighted
Explorer
Explorer
6,200 Views
Registered: ‎10-29-2008

Re: PULLUP pins in XPS UCF without NET

I can create an external port for it XPS but then,  what is the simplest way to assign it a fixed value of '0' or '1'?

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Highlighted
Instructor
Instructor
6,197 Views
Registered: ‎07-21-2009

Re: PULLUP pins in XPS UCF without NET

I can create an external port for it XPS but then,  what is the simplest way to assign it a fixed value of '0' or '1'?

 

In your source code, define the signal ports as outputs, and assign these signals the values which are needed by your design.  I am not an XPS expert, so I am unaware of any impediments which might arise as a result of using XPS.

 

-- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
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Highlighted
Explorer
Explorer
6,185 Views
Registered: ‎10-29-2008

Re: PULLUP pins in XPS UCF without NET

Thanks, that is what I would normally do if not working in XPS.  In XPS though you have to have a PCore to connect signals too.

 

My issue is that I am connecting to an SPI Flash chip using the AXI SPI PCore and I need to drive two other pins on the chip that the AXI SPI PCore knows nothing about.  That is, I can't connect them to the core.

 

What I ended up doing was dropping two Utility Flip-Flop PCores in (one for each of the chip pins) and setting them to output the levels that I needed.  It works.

 

Does a Xilinx Employee have a better solution than this?

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Instructor
Instructor
6,179 Views
Registered: ‎07-21-2009

XPS sounds like a pain...

I may be showing my ignorance here...  Two possible suggestions:

 

  • Is it possible to subordinate the XPS 'package' to a conventional ISE design flow?  This would free you, and your design.
  • If this is a common problem or issue, a webcase should find a quick and general solution.  If you pursue a webcase, please post the recommended solution to this thread so others may benefit from the wisdom you have gained.

 

-- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
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Explorer
Explorer
6,177 Views
Registered: ‎10-29-2008

Re: XPS sounds like a pain...

Here is how my project looks in "Project Navigator"

ProjectParts.png

 

To view the project in XPS I double click "microblaze_pps.xml" above which opens my .xmp in XPS. 

 

Inside XPS is where the whole MicroBlaze based embedded system is wired together via AXI bus etc.

 

On 1) "Is it possible to subordinate the XPS 'package' to a conventional ISE design flow?  This would free you, and your design."  What do you mean by this?

 

On 2) Unless a Xilinx Employee can point to a better/simpler solution than my using a flip-flop core , it would probably be considered by Xilinx as a feature request.  I haven't had any luck at all with feature requests thru web-cases.

 

Thanks.

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Highlighted
Instructor
Instructor
6,166 Views
Registered: ‎07-21-2009

Re: XPS sounds like a pain...

On 2) Unless a Xilinx Employee can point to a better/simpler solution than my using a flip-flop core , it would probably be considered by Xilinx as a feature request.  I haven't had any luck at all with feature requests thru web-cases.

 

Webcase folks are Xilinx employees, and you have no luck whatsoever if you do not give them a chance to help you.

 

-- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
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