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Visitor tiagormk
Visitor
8,365 Views
Registered: ‎07-01-2010

PhysDesignRules error

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Hi all,

 

I'm getting the following error during the place and route of my design:

 

ERROR:PhysDesignRules:2053 - Unsupported MMCM_ADV configuration. The signal sig_gpio_i<31:12><1> on the CLKIN2 pin of
   MMCM_ADV comp clock_manager/mmcm_adv_inst with COMPENSATION mode ZHOLD must be driven by an IOB that is clock
   capable.

 

The signals it refers to are following ones in the top level of my design:

...

signal sig_gpio_i : std_logic_vector(31 downto 0);
signal sig_ext_int : std_logic_vector(7 downto 0);

...
sig_gpio_i(31 downto 12) <= (others => '0'); --yields ERROR:PhysDesignRules:2053 ????????
...
sig_ext_int(7 downto 4) <= (others => '0'); --also yields ERROR:PhysDesignRules:2053 ????????

...

 

The main problem here is that everything WAS compiling just fine (and working) UNTIL the moment I've added some chipscope blocks for debugging(IECON and ILA).

 

I can't see how chipscope's blocks can be related to the signals above (they are not used to drive any of the chipscope's inputs) in order to cause such error. Only commenting out the chipscope's blocks instantiation seems to fix the problem.

 

Does anyone have an idea about how to fix this ?

 

I'm synthesizing for a Virtex 6 xc6vlx240t-ff1156-1 (in a ML605 board) using ISE 13.1 (on Linux 32bits).

 

Thank you very much for any help,

Tiago

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Visitor tiagormk
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10,486 Views
Registered: ‎07-01-2010

Re: PhysDesignRules error

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Thanks for the suggestion.

 

I've already solved the problem by connecting CLKIN2 to a "dummy" clock input. Connecting the same clock input to both CLKIN1 and CLKIN2 didn't work however (it threw some error, I don't remember).

View solution in original post

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Visitor nesaha
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8,359 Views
Registered: ‎08-24-2011

Re: PhysDesignRules error

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I don't know much your design, but the error itself indicates that CLKIN2 pin of your MMCM_ADV component has been connected to sig_gpio_i which is not clk capable. You may reverify the connections of MMCM_ADV component in your high level design.

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Visitor tiagormk
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8,351 Views
Registered: ‎07-01-2010

Re: PhysDesignRules error

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The code that instantiates the MMCM_ADV is generated automatically by coregen. I checked the generated connections and the CLKIN2 pin is initialized with 0 (my clock manager have only one input).

 

It seems ISE is making some kind of confusion with signals driven by GND, but I have no idea why this only happens when I instantiate the chipscope components in the design.

 

Maybe there is some kind of constraint that can be applied to CLKIN2 in order to avoid this kind of problem.

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Visitor nesaha
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8,337 Views
Registered: ‎08-24-2011

Re: PhysDesignRules error

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It's very strange that you have this error only after adding chipscope to your design.

 

I created a mmcm using clock wizard core in Coregen and provided the HDL code. As you mentioned, I saw the CLKIN2 pin of MMCM_ADV is connected to zero.

 

As a temporary solution, I thought, if you conncet CLKIN2 pin to the same signal connected to CLKIN1, may solve the problem. Because it's indicated that CLKINSEL is set to select the primary clock. So it shouldn't cause a problem. I didn't try that, but it may work.

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Visitor tiagormk
Visitor
10,487 Views
Registered: ‎07-01-2010

Re: PhysDesignRules error

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Thanks for the suggestion.

 

I've already solved the problem by connecting CLKIN2 to a "dummy" clock input. Connecting the same clock input to both CLKIN1 and CLKIN2 didn't work however (it threw some error, I don't remember).

View solution in original post

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Visitor liosch
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8,114 Views
Registered: ‎01-23-2012

Re: PhysDesignRules error

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This workaround is not necessary.

With the same kind of problem, and after further discussion with Xilinx, the solution is :

"This error is caused by KEEP constraints that are added to ChipScope input signals to make them easier to see in a netlist, or to change in FPGA Editor.  This error can be resolved by disabling the generation of the KEEP constraints by setting the XCO parameter disable_save_keep to true, and regenerating the ChipScope core."

 

So, edit chipscope_ila.xco, change disable_save_keep to true and restart ise job. That's it !

 

Don't forget to click on Kudo ;-)

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Observer dpodva
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8,049 Views
Registered: ‎01-17-2012

Re: PhysDesignRules error

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Hmmmm,  everytime I try your solution the ila.xco file parameter gets over written to false when re-generating the core.  Is there something else that needs to be done?

 

Thanks.

 

 

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Visitor cek333
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7,850 Views
Registered: ‎03-28-2011

Re: PhysDesignRules error

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Hello dpodva, I noticed a similar issue. I think it's best to close the project in coregen before editing the xco file. (I think that's where I got screwed up.) Here I detail the steps I took:

First, close the project. Open the <core_name>.xco file. Change "CSET disable_save_keep=true". Save the file. From coregen, select File > Open Project > select your project. In the 'Project IP' window select the core that you had previously configured. Under 'Actions' on the right hand side, select 'Regenerate (Under Current Project Settings)'. Click 'Yes' to the warnings. The core will be regenerated. (Double check that the xco file wasn't overwritten with the original options.) 

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