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Portability Error:90

Newbie
Posts: 1
Registered: ‎05-06-2009

Portability Error:90

I'm actually running Xilinx through ALDEC but I get the Portability error when executing implementation.    Where would this command line be invoked and what could the -k switch possibly refer to

 

NGDBUILD done.
Executing C:\Xilinx\11.1\ISE\bin\nt\map.exe  -p 3S250ETQ144-5 -o "map.ncd"  -detail  -pr b  -ignore_keep_hierarchy  -k  4  -cm area  -c 100 "gates2_top.ngd" "gates2_top.pcf"
Release 11.1 - Map L.33 (nt)
Copyright (c) 1995-2009 Xilinx, Inc.  All rights reserved.
Portability:90 - Command line error: Switch "-k" is not allowed.

Usage: map [-bp] [-c [<packfactor:0,100>]] [-cm <covermode>] [-detail]
[-equivalent_register_removal on|off] [-global_opt off|power|speed|area]
[-ignore_keep_hierarchy] [-intstyle ise|xflow|silent] [-ir [off|place|all]]
[-ise <iseProjectFile>] [-l] [-lc off|area|auto] [-logic_opt off|on] [-ntd] [-o
<outfile[.ncd]>] [-ol std|med|high] [-p <partname>] [-power off|on]
[-activityfile <activityfile[.vcd|.saif]>] [-pr off|i|o|b]
[-register_duplication [off|on]] [-retiming off|on] [-smartguide <guide[.ncd]>]
[-t <costtable:1,100>] [-timing] [-tx on|off|aggressive|limit] [-u] [-w] [-x]
[-xe c|n] <infile[.ngd]> [<prffile[.pcf]>]
File 'c:/Verilog_Tutorials/my_designs/Example1/gates2/implement/ver1/rev1/map.ncd' does not exist.
MAP failed.
Implementation ver1->rev1 Failed.
 

Xilinx Employee
Posts: 2,480
Registered: ‎08-13-2007

Re: Portability Error:90

[You should proably have posted this to the Implementation board since it doesn't involve synthesis.]

 

the -k option was a valid map option through ISE 10.1.03i, which controlled how input functions got mapped into CLBs. You can see the details in the 10.1 Development Systems Reference Guide:

 http://toolbox.xilinx.com/docsan/xilinx10/books/docs/dev/dev.pdf (Development System Reference Guide)

This option does not appear to be supported in 11.1's map according to the 11.1 documentation.

I believe Aldec has a set of TCL files or other similar method that specify the interface between ActiveHDL and the ISE back-end tools - I believe they call this the "Design Flow Manager" You should check with them to see if they have updates for 11.1 or if there is a method to disable the passing of the -k switch.

Optionally - you could always use ISE for implementation in Project Navigator or batch mode flow to temporarily bypass ActiveHDL here.

 

bt

Newbie
Posts: 1
Registered: ‎07-13-2010

Re: Portability Error:90

Hi,

 

I am having the same problem with the "-k" switch.  Did you find the solution for it yet?

Thank you

Xilinx Employee
Posts: 935
Registered: ‎07-01-2008

Re: Portability Error:90

As Tim said, the -k map switch was deprecated in 11.1. If ProjNav is creating a command line with this switch in 11.1 or later then I would suspect that there is an install problem or environment setting issue that is mixing an older version of ProjNav with a newer map executable.