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Adventurer
Adventurer
451 Views
Registered: ‎05-18-2018

Routing to make signals accessible to fabric and ILA

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I have a design where I want to debug some output pins, but the hardware is not easily accessible, so I put a VIO core and an ILA core in my design.

I am using Vivado 2019.1 and am designing for the ZYNQ UltraScale+.

Without the debug-related blocks, the design synthesizes, implements, and generates a bitstream with no critical warnings or errors.

NOT_ACCESSIBLE_TO_FABRIC.png

However, with the ILA and VIO blocks added as above, I get "not accessible from the fabric routing" critical warnings during synthesis and implementation:

 

 

SYNTH_CRIT_WARNINGS.png

 

In implementation, I error out because of "partially routed nets" that correspond to the fabric-inaccessible nets from the synthesis messages.

IMPL_CRIT_WARNINGS_AND_ERRORS.png

 

Questions:

How can I apply the ILA/VIO blocks in a way that I can see these signals, but that does not error out or give critical warnings?

Are any of these warnings something I can ignore?

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1 Solution

Accepted Solutions
Adventurer
Adventurer
234 Views
Registered: ‎05-18-2018

Re: Routing to make signals accessible to fabric and ILA

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Based on what I've read and experienced, the OSERDESE3-to-OBUFDS path, like the OBUFDS-to-pin path, is a dedicated (i.e., effectively off-fabric) path and cannot be probed via ILA.

I ended up probing the input of the OSERDESE3.

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8 Replies
Xilinx Employee
Xilinx Employee
428 Views
Registered: ‎05-08-2012

Re: Routing to make signals accessible to fabric and ILA

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Hi @joelschad 

This messaging could be due to a MARK_DEBUG net that is set on the output of an OBUF. Can this be verified by opening the post-synthesis design? If this is the case, then moving the MARK_DEBUG to before the OBUF would resolve the issue.

The reason it is not routable is that the OBUF to package pin is dedicated path. Adding a probe requires another path which is not physically there.

If this is not the case, can you show the schematic where the probe/MARK_DEBUG is applied and how it connects to the output port?

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Adventurer
Adventurer
389 Views
Registered: ‎05-18-2018

Re: Routing to make signals accessible to fabric and ILA

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Thanks for the tip, @marcb.

As originally synthesized, I had, in fact, tried to mark OBUFDS output pins as debug nets. The debug net was the ALI_CLK_P pin originally, which was attached to the OBUFDS output.

I removed the MARK_DEBUG from the output and marked the input as you suggested. After resynthesizing, it looked like below:

 

was_here_now_here.png... and...

 

now_debugged_net.png

 

After implementation, the debug nets show correctly, but I still get the same critical warnings and the same errors:

 

still_not_routing.png... and...

 

write_bitstream_errors.png

 

 

Any thoughts?

 

 

 

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Adventurer
Adventurer
380 Views
Registered: ‎05-18-2018

Re: Routing to make signals accessible to fabric and ILA

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Follow-up:

Can I ILA probe the outputs of FDREs or OSERDESE3 blocks?

If not, what would be the best way to look at these signals?

 

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371 Views
Registered: ‎09-17-2018

Re: Routing to make signals accessible to fabric and ILA

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j,

A thought, if the output pin is a tristatable IO, then you can look at the I while the O is driving data (in effect, you see what you are sending to the pin).  An OBUF is the simple one way only, but an IOBUF will do what you need.

l.e.o.

 

Xilinx Employee
Xilinx Employee
348 Views
Registered: ‎03-29-2013

Re: Routing to make signals accessible to fabric and ILA

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You might need an ISERDES if you do so as the IO data is probably running fast.... Can you debug before the OSERDES, on the slow clock side?

Adventurer
Adventurer
295 Views
Registered: ‎05-18-2018

Re: Routing to make signals accessible to fabric and ILA

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Yes, I can debug the slow parallel-in side.

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Xilinx Employee
Xilinx Employee
238 Views
Registered: ‎05-08-2012

Re: Routing to make signals accessible to fabric and ILA

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Hi @joelschad 

If any of the posts helped to resolve this question, could you mark that post as an accepted solution? This would help others searching the same topic to know that the content helped with this question.

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Don’t forget to reply, kudo, and accept as solution.
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Adventurer
Adventurer
235 Views
Registered: ‎05-18-2018

Re: Routing to make signals accessible to fabric and ILA

Jump to solution

Based on what I've read and experienced, the OSERDESE3-to-OBUFDS path, like the OBUFDS-to-pin path, is a dedicated (i.e., effectively off-fabric) path and cannot be probed via ILA.

I ended up probing the input of the OSERDESE3.

0 Kudos