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Registered: ‎05-26-2020

Seven segment clock with buttons to change time - can't get the buttons working

New to FPGAs. VHDL on a Basys 3. I'm trying to make a clock where you can adjust the time using the buttons (as a clock where you can't adjust the time is pretty useless!)

The clock function works. The seven-seg works. But I can't get the buttons to adjust the time.

I've tried a few options.

  • I've tried multiple processes (one for the button, one for the clock), but that causes "Multiple Driver Nets" errors.
  • I've tried having the buttons change a signal that is added/subtracted and combining that with the clock (i.e. hours <= hours + 1 + hours_added), but again, that signal needs to be reset, and that gets the same Multiple Driver Nets error.
  • I've tried a complex section of ifs (in code below); no errors, but it just doesn't work. Note the led2 <= btnC_clr also doesn't work.

Anyone know a solution?

Here's the code:

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.numeric_std.all;

entity digital_clock is
    port ( 
        clk : in std_logic; --100MHz
        seven_seg_selection : out STD_LOGIC_VECTOR (3 downto 0);
        seven_seg : out STD_LOGIC_VECTOR (6 downto 0);
        led : out std_logic;
        led2 : out std_logic;
        btnU : in std_logic;
        btnD : in std_logic
        );
end entity digital_clock;

architecture behavioral of digital_clock is

    component clock_divider
        port (
            clk : in std_logic;
            clk_1s : out std_logic
            );
    end component;

    component binary_to_hex
        port (
            binary_in : in std_logic_vector(3 downto 0);
            hex_out : out std_logic_vector(6 downto 0)
            );
    end component;

    component debouncer is
        port (
            clk:        in  std_logic;
            btn:        in  std_logic;
            btn_clr:    out std_logic
        );
    end component;

    signal hours : integer := 20;
    signal minutes : integer := 0;
    signal seconds : integer := 0;

    signal hours_tens : std_logic_vector(6 downto 0);
    signal hours_singles : std_logic_vector(6 downto 0);
    signal minutes_tens : std_logic_vector(6 downto 0) ;
    signal minutes_singles : std_logic_vector(6 downto 0);

    signal hours_tens_binary : std_logic_vector(3 downto 0) := "0000";
    signal hours_singles_binary : std_logic_vector(3 downto 0) := "0000";
    signal minutes_tens_binary : std_logic_vector(3 downto 0) := "0000";
    signal minutes_singles_binary : std_logic_vector(3 downto 0) := "0000";

    signal seven_seg_selector_counter : std_logic_vector(19 downto 0);
    signal seven_seg_selector : std_logic_vector(1 downto 0);

    signal clk_1s : std_logic := '0';

    signal btnU_clr : std_logic;
    signal btnD_clr : std_logic;

begin

clock_generator : clock_divider port map (clk => clk, clk_1s => clk_1s);

led <= clk_1s;

led2 <= btnU_clr; -- doesn't work

counting_process :
    process (clk_1s) is
    begin
        if rising_edge(clk_1s) then
            if seconds = 59 then
                seconds <= 0;
            else
                seconds <= seconds + 1;
            end if;

            if minutes = 59 and seconds = 59 then
                minutes <= 0;
            elsif seconds = 59 then
                minutes <= minutes + 1;
            end if;

            if minutes = 59 and seconds = 59 and btnU_clr = '1' then
                hours <= hours + 2;
            elsif (hours = 23 and minutes = 59 and seconds = 59 and btnU_clr = '1') or (minutes = 59 and seconds = 59) or (btnU_clr = '1') then
                hours <= hours + 1;
            elsif hours = 23 and minutes = 59 and seconds = 59 then
                hours <= 0;
            end if;
        end if;
    end process counting_process;

hours_tens_binary <= std_logic_vector(to_unsigned((hours / 10), hours_tens_binary'length));
hours_singles_binary <= std_logic_vector(to_unsigned((hours mod 10), hours_singles_binary'length));
minutes_tens_binary <= std_logic_vector(to_unsigned((minutes / 10), minutes_tens_binary'length));
minutes_singles_binary <= std_logic_vector(to_unsigned((minutes mod 10), minutes_singles_binary'length));

convert_binary_to_hex_hours_tens : binary_to_hex port map (binary_in => hours_tens_binary, hex_out => hours_tens);
convert_binary_to_hex_hours_singles : binary_to_hex port map (binary_in => hours_singles_binary, hex_out => hours_singles); 
convert_binary_to_hex_minutes_tens : binary_to_hex port map (binary_in => minutes_tens_binary, hex_out => minutes_tens); 
convert_binary_to_hex_minutes_singles : binary_to_hex port map (binary_in => minutes_singles_binary, hex_out => minutes_singles); 

seven_seg_selector_process :
    process(clk)
    begin 
        if(rising_edge(clk)) then
            seven_seg_selector_counter <= std_logic_vector(unsigned(seven_seg_selector_counter) + "1");
        end if;
    end process seven_seg_selector_process;

seven_seg_selector <= seven_seg_selector_counter(19 downto 18);

seven_seg_activator_process :
    process(seven_seg_selector)
    begin
        case seven_seg_selector is
        when "00" =>
            seven_seg_selection <= "0111"; 
            seven_seg <= hours_tens;
        when "01" =>
            seven_seg_selection <= "1011"; 
            seven_seg <= hours_singles;
        when "10" =>
            seven_seg_selection <= "1101"; 
            seven_seg <= minutes_tens;
        when "11" =>
            seven_seg_selection <= "1110"; 
            seven_seg <= minutes_singles;
        end case;
    end process seven_seg_activator_process;

debouncer_btnU:
    debouncer
        port map (
            clk => clk,
            btn => btnU,
            btn_clr => btnU_clr
        );

debouncer_btnD:
    debouncer
        port map (
            clk => clk,
            btn => btnD,
            btn_clr => btnD_clr
        );

end architecture behavioral;
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1 Reply
Highlighted
134 Views
Registered: ‎06-21-2017

Re: Seven segment clock with buttons to change time - can't get the buttons working

Have you simulated?  Are your buttons active high or active low, that is, when you press a button, does its output go from 1 to 0 or from 0 to 1?  What do you mean by "doesn't work"?  Are you saying that pressing the button has no effect?  Does this design have timing errors? 

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