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833 Views
Registered: ‎10-03-2017

Translate error

ISE 14.4

 

Initiially i created the separate projects for XC6LX16 and XC6LX45 individually. I added MicroBlaze for SPI and UART communication.When I am trying to generate bitstream for both these projects, in translate process it shows error.

 

ERROR:NgdBuild:604 - logical block
'Inst_Mblaze/microblaze_0/microblaze_0/MicroBlaze_Core_I' with type
'MicroBlaze_Core' could not be resolved. A pin name misspelling can cause
this, a missing edif or ngc file, case mismatch between the block name and
the edif or ngc file name, or the misspelling of a type name. Symbol
'MicroBlaze_Core' is not supported in target 'spartan6'.

 

But when i select device as XC6LX150 and i add SPI UART in MicroBlaze it generates bitstream without any error.

 

How to resolve this error?

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Moderator
Moderator
795 Views
Registered: ‎01-16-2013

Hi,

As you mentioned everything works fine with XC6LX150 FPGA and have issues with other parts, please try below suggestions.

1) Are you using NGC file generated with 150 part in 16/45 part?
2) Did you tried to customize microblaze specifically for the part you wanted to use?

This looks like netlist naming issue, I guess re-generating the microblaze with specific part should resolve the error.

Also refer:
https://www.xilinx.com/support/answers/38262.html
https://www.xilinx.com/support/answers/45628.html

Thanks,
Yash
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