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Observer
Observer
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Registered: ‎09-07-2018

Unroutable situtation in one net during P&R in ISE 14.7

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I have been having an issue getting my design to pass during the place and route phase of ISE 14.7. This is targetting a Virtex6, part xc6vlx760, package ff1760, speed -2.  

 

The message during Place and route that first shows up is this. 

 

WARNING:Route:436 - The router has detected an unroutable situation for one or more connections. The router will finish the rest of the
design and leave them as unrouted. The cause of this behavior is either an issue with the placement or unroutable placement constraints.
To allow you to use FPGA editor to isolate the problems, the following is a list of (up to 10) such unroutable connections:
Unroutable signal: emul_v6_iserdes_fpga4_fpga2_s0_inst/is_clk_fast pin:
emul_v6_iserdes_fpga4_fpga2_s0_inst/GEN_LANES[30].emul_v6_iserdes_lane_inst/ISERDESE1_inst_master/CLK

 

There are a few more signals listed in the message, but removed for brevity. The design later fails in bitgen with an error message saying  the net is not completely routed. 

 


I have tried running map and P&R with non-timing driven options and different constraints to try and get it route and it still fails.

I have looked through the unrouted design in fpga editor and it seems (to me atleast) that because of the placement of different GEN_LANES instances, which are spread out far apart, the router has trouble connecting them. I am unsure if this is the actual problem and if it is how I should go about solving it. 

 

I have another fpga that has the same exact module "emul_v6_iserdes_fpga4_fpga2_s0_inst" and it passes P&R perfectly fine. The only difference is the number of lanes that is instantiated in the serdes module. Because of the large number of signals being passed between fpga2 and fpga4, it causes our serdes to create a large number of lanes in this case. And the large number of lanes causes different instances to be placed far apart, causing routing issues? 

 

 I added the map.ncd file as it P&R .ncd file was too big.

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Moderator
Moderator
565 Views
Registered: ‎01-16-2013

Re: Unroutable situtation in one net during P&R in ISE 14.7

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@shanezhao

 

Based on your description, it does look to be an unroutable situation due to architecture rules. I would suggest checking the Virtex 6 selectIO and architecture user guide to know the valid connections. 

 

--Syed

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Did you check our new quick reference timing closure guide (UG1292)?
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Highlighted
Moderator
Moderator
566 Views
Registered: ‎01-16-2013

Re: Unroutable situtation in one net during P&R in ISE 14.7

Jump to solution

@shanezhao

 

Based on your description, it does look to be an unroutable situation due to architecture rules. I would suggest checking the Virtex 6 selectIO and architecture user guide to know the valid connections. 

 

--Syed

---------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.

Did you check our new quick reference timing closure guide (UG1292)?
---------------------------------------------------------------------------------------------

View solution in original post

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