UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Contributor
Contributor
508 Views
Registered: ‎11-03-2016

Updating cell properties after run implemenation

I have finished my design in 7-Series GTP RX with properties RX_CM_SEL= 2'b00 then generated bit file.

Now I need generate another bit file base on same design but change some GTP properties (for example : RX_CM_SEL = 2'b10).

My approach as below step...
(1) open implementation design
(2) find cell gtpe2_i
(3) change gtpe2_i properties (for example : RX_CM_SEL = 2'b10)
(4) generate bit file again (without re-synthesis and re-implementation)

Is this approach correct and no side effect?

0 Kudos
1 Reply
Xilinx Employee
Xilinx Employee
455 Views
Registered: ‎09-20-2012

Re: Updating cell properties after run implemenation

Hi @dick0329

 

As you are only changing cell properties, I don't foresee any issue.

 

Make sure you generate the bitfile using write_bitstream command from TCL console.

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)
0 Kudos