04-22-2018 07:37 PM
Suddenly after some source file change, my Vivado 2017.3 project failed during write_bit_stream phase with an error message like "ERROR: [Designutils 20-1756] VEAM exception in tile CLE_M_X66Y91: Conflicting values 'TRUE' != 'FALSE' for attr 'D_I_USED' in veamRef 'Icle_cle_m_core_X0Y0_R0/Icle_m/LUTM8'".
04-22-2018 09:40 PM
Can you share the implementation log file to evaluate it?
Are you facing node overlap high values while routing phase ? If yes, then these could be one of the reason for this errors.
04-22-2018 10:35 PM - edited 04-22-2018 11:46 PM
No, I didn't meet congestion issue. Timing was met. Everything seemed fine, except bit file generation.
It looked like being related to incremental implementation. After I disabled incremental mode, the problem was solved. It should be a bug in Vivado's handling of incremental mode. Probably, some reuse didn't fully check constraints or updated things consistently.
The error message tells inconsistency of property "D_I_USED" of CLE_M_X66Y91.
I checked the implementation log, and found nothing helpful except the error message. After I changed the mode, the old log files were automatically deleted by Vivado.
I don't think node overlap or design be the reason. Don't you think it's a bug of the tool?
04-22-2018 11:45 PM - edited 04-22-2018 11:46 PM
Can you share a testcase to regenerate this error at our end? If by disabling incremental mode the error gets resolved, we may file a CR on it after done a debug on it. First we need to do a debug on it.
04-22-2018 11:56 PM
04-24-2018 04:12 AM - edited 04-24-2018 04:14 AM
If only the incremental run is giving such error message then it looks like a bug to me. Are you seeing the same issue in Vivado 2018.1 for same design? Also which OS are you using?
It would be very helpful if you can share the design so that we can forward it to the factory and get it fixed.
I can send you a private link so that the design is not shared publically.
04-27-2018 05:40 AM - edited 04-27-2018 05:41 AM
Before I enabled incremental run, there's no trouble. After I disabled incremental run, trouble disappeared. I didn't get the project implemented in Vivado 2018.1 due to another bug, submitted on another thread.
Sorry, I could not share our project design files with you.
05-01-2018 11:10 PM
Thanks for the update. It would be difficult to report the issue to Factory without design files. We will keep a watch and see if any other user reports such similar issue.
Since you have a solution i.e disabling incremental run, Can you please close this thread by marking your above post as "Accept as Solution".