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analogital
Contributor
Contributor
848 Views
Registered: ‎04-11-2019

Vivado 2021.1 router error Abnormal program termination (EXCEPTION_ACCESS_VIOLATION)

Hi all 

Using vivado 2021.1 build project but failed in implementation. vivado not proived error message but implementation log show: Abnormal program termination (EXCEPTION_ACCESS_VIOLATION),I try reset project and run vivado flow but it still implementation failed and log report show: Abnormal program termination (EXCEPTION_ACCESS_VIOLATION), how to sloved this problem?

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17 Replies
watari
Professor
Professor
836 Views
Registered: ‎06-16-2013

Hi @analogital 

 

I suggest you to share more details (*1) to investigate the route cause.

 

*1)

OS

RAM

log file, if you got it.

and so on...

 

[Note]

I have already compiled my design by Vivado 2021.1. However I haven't seen any more abnormal failed.

 

 

Best regards,

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hongh
Moderator
Moderator
836 Views
Registered: ‎11-04-2010

Could you provide the opt.dcp and runme.log of impl?

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analogital
Contributor
Contributor
812 Views
Registered: ‎04-11-2019

Hi @watari 

1. OS: Windows 10 20H2 WorkStation Editon

2.RAM:16GB

3:Target FPGA: 7K325T

about runme.log can i use email send it to you?

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analogital
Contributor
Contributor
811 Views
Registered: ‎04-11-2019

Can i use email to send you log file ?

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watari
Professor
Professor
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Registered: ‎06-16-2013

Hi @analogital 

 

Would you upload log file on this post ?

 

Best regards,

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hongh
Moderator
Moderator
789 Views
Registered: ‎11-04-2010

I'll send an Ezmove link to you for uploading the log and dcp files.

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analogital
Contributor
Contributor
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Registered: ‎04-11-2019

Hi @watari 

This not a personal project so i can't upload project file in this post ,sorry for that.

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analogital
Contributor
Contributor
748 Views
Registered: ‎04-11-2019

Okay, i already send file to you .

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hongh
Moderator
Moderator
741 Views
Registered: ‎11-04-2010

It looks route_design can complete without issue and routed.dcp has been generated.

You can just open the design checkpoint file routed.dcp and check the result of report_timing_summary and report_power.

Ex: open_checkpoint XX_routed.dcp

report_timing_summary -file XX_timing.rpt

report_power -file XX_power.rpt

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analogital
Contributor
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Registered: ‎04-11-2019

Thank you ,but i can't generate bitstream files.

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hongh
Moderator
Moderator
660 Views
Registered: ‎11-04-2010

Please try the below commands:

open_checkpoint XX_routed.dcp

write_bitstream tt.bit

You can also choose to avoid generating report during implementation

 

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syedz
Moderator
Moderator
541 Views
Registered: ‎01-16-2013

@analogital  

 

Can you share the crash log file with us? Check this AR: https://www.xilinx.com/support/answers/55854.html 

If possible, Can you try running implementation on a different machine? This will narrow down if the issue is specific to one machine or OS.

 

--Syed

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syedz
Moderator
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Registered: ‎01-16-2013

@analogital 

 

Can you share the crash log file as requested in my previous post?

 

--Syed

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analogital
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Contributor
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Registered: ‎04-11-2019

i try use vivado build another project but vivado 2021.1 still can't route design,and report Abnormal program termination,it looks i need reinstall windows?

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syedz
Moderator
Moderator
389 Views
Registered: ‎01-16-2013

@analogital 

 

Can you share the crash log file? you should find its location from runme.log file. Look at this AR: https://www.xilinx.com/support/answers/55854.html 

2021.1 supports this list of windows OS so it could be due to unsupported OS:

Microsoft Windows Professional/Enterprise 10.0 1809 Update; 10.0 1903 Update; 10.0 1909 Update; 10.0 2004 Update

 

If you are seeing the crash even with Vivado example design then it should be corrupt install or machine OS related. 

 

--Syed

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Give Kudos to a post which you think is helpful and reply oriented.

Did you check our new quick reference timing closure guide (UG1292)?
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analogital
Contributor
Contributor
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Registered: ‎04-11-2019

i can send log file via email.

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analogital
Contributor
Contributor
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Registered: ‎04-11-2019

After multiple tests i found if the synth strategy the same as the impl strategy , vivado will report route error, If the synth and impl strategy are different,vivado will report bitstream gen failed.

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