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Visitor
Visitor
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Registered: ‎07-21-2020

Vivado Block design Clock error

Hi Team,

I Tried to design a block design using vivado 2014.2 design suite for reading a video from an RGB camera. but it shows error in pixel clock section. but i am not able to solve this clock config error. i am attaching the error details.

err1.JPGerr2.JPGerrorBD Diagram.jpg

please help me to solve issues

How i can solve this issue.

is there any issue in connection of Video In to AXI Stream block design.

Yours Faithfully,

Shankar

 

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Moderator
Moderator
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Registered: ‎02-09-2017

Hi @Shankar,

 

By looking at your XDC file and the error description, I believe the problem is due to the input and output pins have not been assigned a physical pin.

Since Vivado does not know in which bank and physical pin those ports should be placed, it ends up throwing a "Failed to Place" error.

Please review the document Vivado I/O and Clock Planning - UG899, specially the part Placing I/O Ports, pg. 42.

Thanks,

Andre Guerrero

Product Applications Engineer

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