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Explorer
Explorer
4,871 Views
Registered: ‎03-18-2008

WARNING: [Constraints 18-550] Could not create 'IOSTANDARD' constraint because net 'sys_crg/instance_name/resetn' is not directly connected to top level port.

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  clk_wiz_0 instance_name
   (
    .clk_out1(free_clk),   //100MHz 
    .clk_out2(cpu_clk),   //75MHz  
    .clk_out3(clk24576),   //24.576MHz  
    .resetn(rst_n),        
    .locked(),        
    .clk_in1_p(sysclk1_300_p),  
    .clk_in1_n(sysclk1_300_n)); 

 

module clk_wiz_0(clk_out1, clk_out2, clk_out3, resetn, locked,
  clk_in1_p, clk_in1_n)
/* synthesis syn_black_box black_box_pad_pin="clk_out1,clk_out2,clk_out3,locked,clk_in1_p,clk_in1_n" */;
  output clk_out1;
  output clk_out2;
  output clk_out3;
  input resetn;
  output locked;
  input clk_in1_p;
  input clk_in1_n;
endmodule

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Xilinx Employee
Xilinx Employee
8,106 Views
Registered: ‎09-20-2012

Re: WARNING: [Constraints 18-550] Could not create 'IOSTANDARD' constraint because net 'sys_crg/instance_name/resetn' is not directly connected to top level port.

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Hi @m006

 

Yes, it can be ignored in this case as you applied the constraint from top level XDC.

Thanks,
Deepika.
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Xilinx Employee
Xilinx Employee
4,859 Views
Registered: ‎09-20-2012

Re: WARNING: [Constraints 18-550] Could not create 'IOSTANDARD' constraint because net 'sys_crg/instance_name/resetn' is not directly connected to top level port.

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Hi @m006

 

It looks like rst_n is not top level port in the design hence the warning. The IP XDC has IOSTANDARD constraint on the IP pin resetn but is unable to propagate it to top level port. 

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
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Explorer
Explorer
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Registered: ‎03-18-2008

Re: WARNING: [Constraints 18-550] Could not create 'IOSTANDARD' constraint because net 'sys_crg/instance_name/resetn' is not directly connected to top level port.

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no,it is connected pad.

rst.png
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Xilinx Employee
Xilinx Employee
4,794 Views
Registered: ‎09-20-2012

Re: WARNING: [Constraints 18-550] Could not create 'IOSTANDARD' constraint because net 'sys_crg/instance_name/resetn' is not directly connected to top level port.

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Hi @m006

 

The BUFGCE which is present on the path is preventing the constraint propagation. 

 

If you want the BUFGCE to be present, you can write IOSTANDARD constraint on rst_n port in top level XDC and ignore the warning.

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)
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Explorer
Explorer
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Registered: ‎03-18-2008

Re: WARNING: [Constraints 18-550] Could not create 'IOSTANDARD' constraint because net 'sys_crg/instance_name/resetn' is not directly connected to top level port.

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yes,i have added IOSTANDARD constraint on rst_n port in top.xdc

 

set_property PACKAGE_PIN L19 [get_ports "rst_n"]
set_property IOSTANDARD LVCMOS12 [get_ports "rst_n"]

 

do you mean i can ignore this warning?

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Xilinx Employee
Xilinx Employee
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Registered: ‎09-20-2012

Re: WARNING: [Constraints 18-550] Could not create 'IOSTANDARD' constraint because net 'sys_crg/instance_name/resetn' is not directly connected to top level port.

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Hi @m006

 

Yes, it can be ignored in this case as you applied the constraint from top level XDC.

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)

View solution in original post