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Contributor
Contributor
634 Views
Registered: ‎10-28-2018

Why net delay is so long ?

One net  delay is 5ns in my critical path .

But the net have only one fanout.

and it is very short net.

Why does it have so long delay

Thank you

 

khyu_0-1597900701004.png

 

khyu_1-1597900876161.png

 

 

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9 Replies
Xilinx Employee
Xilinx Employee
631 Views
Registered: ‎01-30-2019

HI @khyu 

1. Can you check the hold requirement of this path? 

2. Is there any local congestion around the area where the flop and lut are placed?  ( to check if the tool is trying to avoid the congestion and thus the large delay )

3. Did you try different placer and router directives ? 

 

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Contributor
Contributor
607 Views
Registered: ‎10-28-2018

1. Can you check the hold requirement of this path? 

 

The hold slack is 3.541

 

2. Is there any local congestion around the area where the flop and lut are placed?  ( to check if the tool is trying to avoid the congestion and thus the large delay )

There is no congestion in these two CLB

1.jpg

3. Did you try different placer and router directives ? 

I use the Performance_ExplorePostRoutePhysOpt

Which strategy do you suggestion?

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Xilinx Employee
Xilinx Employee
598 Views
Registered: ‎01-30-2019

Hi @khyu 

From the hold requirement what I meant was the following.

surajc_0-1597905201334.png

 

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Contributor
Contributor
592 Views
Registered: ‎10-28-2018

Hi Surajc:

            My hold requirement is 0

 

khyu_0-1597907079814.png

 

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Xilinx Employee
Xilinx Employee
459 Views
Registered: ‎01-30-2019

Hi @khyu 

Can you share the post opt dcp with me? 

Let me know so that I can send an ezmove link for securely sharing the design

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Contributor
Contributor
430 Views
Registered: ‎10-28-2018

Hi Surajc:

     Yes , I can share the post route opt dcp file

You can send me the upload link 

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Xilinx Employee
Xilinx Employee
403 Views
Registered: ‎01-30-2019

HI @khyu 

I checked your design and there are a lot of critical warnings in methodology report.

Please try fixing those and then proceed for implementation.

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Contributor
Contributor
399 Views
Registered: ‎10-28-2018

Hi Surajc:

          Thank you .

I will clear the critical warning and try again

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Adventurer
Adventurer
321 Views
Registered: ‎03-21-2011

If it doesn't violate timing constraints, perhaps the router thought the bits would just like to take the scenic route around the chip?  Go on a lazy Sunday drive around the [IP] block?