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s002wjhw
Voyager
Voyager
816 Views
Registered: ‎06-26-2015

convert xdc to ucf

is there a tool to convert xdc to ucf?  its been so long since i touch ucf, i forgot the syntax.  how do i convert something like this to ucf

set_property -dict { PACKAGE_PIN R4 IOSTANDARD LVCMOS33 } [get_ports { clk100 }];
create_clock -add -name sys_clk_pin -period 10.00 -waveform {0 5} [get_ports clk100]

create_clock -add -name hdmi_clk -period 6.7 -waveform {0 5} [get_ports hdmi_rx_clk_p]

set_property -dict { PACKAGE_PIN R3 IOSTANDARD LVCMOS33 } [get_ports { hdmi_rx_txen }]; 
set_property -dict { PACKAGE_PIN AA3 IOSTANDARD TMDS_33 } [get_ports { hdmi_rx_n[0] }];

set_property -dict { PACKAGE_PIN T16 IOSTANDARD LVCMOS25 } [get_ports { led[2] }];

 

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4 Replies
syedz
Moderator
Moderator
810 Views
Registered: ‎01-16-2013

@s002wjhw 

 

Any specific reason you want to migrate the design from Vivado to ISE? There isnt a doc for Vivado to ISE however, Check the ISE to Vivado migration user guide and relate the commands:

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_1/ug911-vivado-migration.pdf 

--Syed

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Did you check our new quick reference timing closure guide (UG1292)?
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s002wjhw
Voyager
Voyager
802 Views
Registered: ‎06-26-2015

some the ip need to migrate to some old gen fpga that only ISE supported.

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syedz
Moderator
Moderator
729 Views
Registered: ‎01-16-2013

@s002wjhw 

 

Ok. Check the user guide (UG911) shared in my previous post which should be helpful.

 

--Syed

---------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.

Did you check our new quick reference timing closure guide (UG1292)?
---------------------------------------------------------------------------------------------
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drjohnsmith
Teacher
Teacher
717 Views
Registered: ‎07-09-2009

this is the ISE UCF guide
https://www.xilinx.com/support/documentation/sw_manuals/xilinx11/cgd.pdf

looks like you have 4 pin assignments there and two clocks

pin assignments are like

INST "clk100" LOC=R4;
INST "clk100" IOSTANDARD = LVCMOS33 ;

clock period is set like this ( this one I am not so certain on .. you will need ot check )

TIMESPEC "TSclock" = 10ns "clk100";


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