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pjf_57
Visitor
Visitor
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Registered: ‎05-11-2011

intractable error in MAP - "Pack:1654 - The timing-driven placement phase encountered an error"

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Hi teams,

 

I have seen this error crop up in the forums, but not seen any clear path to resolution.

 

My design is targeted to Virtex 6 and has most VHDL modules floorplanned. Before the last set of design changes, I was able to get it to P&R ok (24,000 slices).

 

I am using ISE 13.4 and when MAP runs, after about an hour, it aborts with the nodescript error "Pack:1654 - The timing-driven placement phase encountered an error".
 

From what I have read, this might be because my specific module placement means that the sum of logic and interconnect latency is greater than the allowed timing constraint - although I cannot be sure that this is what it is.

 

From the MAP report:

WARNING:Pack:1653 - At least one timing constraint is impossible to meet because component delays alone exceed the constraint. A timing   constraint summary below shows the failing constraints (preceded with an Asterisk (*))

 

However, it does not provide any clue as to which path(s) are causing the problem so it is impossible for me to figure out what parts of the logic I need to change, or place closer, etc.

 

There are four failing constraints, but it doesnt show which paths are failing.

 

I have tried the suggestions of "continue on impossible" and also with "-timing", but it always aborts during MAP and I cannot then find out what exactly went wrong.

 

Screenshot of my MAP options attached.

 

Attempts to subsequently run other tools such as generate postmap static timing, result in the following error: ERROR: Mapped NCD file "mat_complete_map.ncd" not found.

 

When I remove some of the replicated logic to make the design smaller (7000 slices), it maps and routes ok.

 

Does anyone have any clues to help me?

 

 

map_properties.jpg
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pjf_57
Visitor
Visitor
6,679 Views
Registered: ‎05-11-2011

Thanks for your help and also to Vinay Kumar Uppala.

 

I upgraded to ISE 14.1 and now get very explicit error messages regarding a BRAM that could not be placed due to a module location constraint.

View solution in original post

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ankury
Explorer
Explorer
5,537 Views
Registered: ‎09-06-2012

Hi,

 

Please use Timing Analyzer (GUI) or TRCE (command line) with the Mapped NCD andPCF files to identify which constraints and paths are failing.

 

I hope this helps

 

Ankury

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bwade
Scholar
Scholar
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Registered: ‎07-01-2008

You say that Map aborts but you don't say anything about the error encountered. Pack:1653 is a warning. Pack:1654 is just a summary error. If there isn't a more specific error in the .map log file then that would be a bug. Some issues like that have been cleaned up so try a newer tool version if you haven't already. For a while fitting failures were going unreported in 13.4 which fits your description of a smaller design working.

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pjf_57
Visitor
Visitor
6,680 Views
Registered: ‎05-11-2011

Thanks for your help and also to Vinay Kumar Uppala.

 

I upgraded to ISE 14.1 and now get very explicit error messages regarding a BRAM that could not be placed due to a module location constraint.

View solution in original post

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