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no detailed reports in ISE

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Visitor
Posts: 15
Registered: ‎08-27-2018

no detailed reports in ISE

Hi,

        I have finished a project using ISE 14.7, and it works well on a FPGA board. But in my ISE project, I can not check  any detailed reports, such as synthesis report, power report. Is there any option setting to solve this problem?

微信截图_20181011092306.png

implement design successfully

微信截图_20181011092452.png

but no reports generated

Xilinx Employee
Posts: 52
Registered: ‎05-22-2018

Re: no detailed reports in ISE

[ Edited ]

Hi @gamefan567,

 

I am not sure why the Detailed Report section is coming as grey out but  the reports will still be available. You can open the reports using a text editor:

 

*.syr - synthesis report (XST)

*.bld - translation (ngdbuild) report

*.mrp - map report

*.par - place & route report

*.twr - Poset P&R timing report, text

*.bgn - BitGen report

 

Check this AR# link, might be the reason for grey out:

https://www.xilinx.com/support/answers/38702.html

 

Thanks,

Raj.

Moderator
Posts: 951
Registered: ‎09-15-2016

Re: no detailed reports in ISE

Hi @gamefan567

 

Below link gives the possible cause of the reports been greyed out in the Design summary view. Have a look.

https://www.xilinx.com/support/answers/38702.html

Regards
Rohit
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