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Visitor wr115946873
Visitor
5,529 Views
Registered: ‎01-14-2014

no valid object found for set_false_path constraint with option '-from [get_clock userclk1]'

When I Implement my design,it reports the warnning "no valid object found for set_false_path constraint with option '-from [get_clock userclk1]'".But I can get this clock in the opened synthesis or implementation design using theTCl "get_clocks userclk1",how can I solve this warnning?

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4 Replies
Xilinx Employee
Xilinx Employee
5,522 Views
Registered: ‎08-02-2007

Re: no valid object found for set_false_path constraint with option '-from [get_clock userclk1]'

hi,

 

is there a typo that i see in the set_false_path constraint? I see from [get_clock userclk1]. can you confirm and check?

 

--hs

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Historian
Historian
5,513 Views
Registered: ‎01-23-2009

Re: no valid object found for set_false_path constraint with option '-from [get_clock userclk1]'

One possibility is that the clock is not yet defined.

 

XDC files are scripts that contain constraint commands. These commands are parsed and executed at the right time in the project flow in an order determined by a number of factors.

 

The set_false_path command clearly has to be done after the create_clock command that creates userclk1. If these are in the wrong order in the same file, or (more likely) are in different files, then it is possible that the file with the set_false_path command is read before the one with the create_clock command. This would explain why you get a message when the set_false_path command is attempted, but you can execute the get_clocks userclk1 command interactively - when you have control in the Tcl console, the whole design is loaded, including executing all the XDC scripts.

 

Things can get even more complicated when IP are involved. If the clock is defined in the XDC file for an IP, then it is possible that the clock is not defined at the time of synthesis (since the IP is a black box at the time of synthesis), but is defined later on (constraints are processed again after synthesis).

 

So, tell us about where the create_clock is with respect to the set_false_path. If it is an order thing, then the order of XDC processing can be modified by setting the PROCESSING_ORDER property of the file to EARLY or LATE (instead of NORMAL, which is the default).

 

Avrum

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Xilinx Employee
Xilinx Employee
5,491 Views
Registered: ‎07-31-2012

Re: no valid object found for set_false_path constraint with option '-from [get_clock userclk1]'

One other trivial reason could be if you have copy pasted the constraint from a different document etc and it might have include certain special characters which might be reading the commands incorrectly.


Alternately try to write the Timing constraints from the GUI, since this should find the exact clock name without chance of any mis-spelt clock names.
Thanks,
Anirudh

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Explorer
Explorer
579 Views
Registered: ‎04-01-2016

Re: no valid object found for set_false_path constraint with option '-from [get_clock userclk1]'

Hi @avrumw

I had exactly the same problem and could solve with your post here. What I did is the following:

  • moved all timing constraints into one xdc file
  • set the property of that xdc file to LATE

Is this good design practice to have all timing constraints in one single and - more important - separate file and set the property to that timing xdc-file to LATE?

Thanks for the answer!

Sebastian

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