04-04-2021 12:11 AM
I need to implement a shift register that can shift 12-bit data 3000 times (3000 time ball pass between flip flops). I will use all the shifted outputs. I have a if condition for this just like:
But I am facing very high fanout. The design is being implemented using SRL16E and the 'request' is going to all clock enable (CE). I am facing very high fanout because I am driving too many. How can I avoid this?
04-04-2021 12:21 AM
You can use the MAX_FANOUT synthesis attribute to limit the fanout for any given register. Any register that reaches this limit should be automatically duplicated.
04-04-2021 12:53 AM
I just tried this but still I see the same number of fanout as before. Am I missing something? Both in and out are 12-bit numbers. Thank you....
(* max_fanout = 50 *) input request; int k =0; always @ (posedge clk) begin if(request) begin for (k =0; k< N; k = k+1) begin if (k== N -1) out[k] <= in; else out[k] <= out[k+1]; end end end
04-04-2021 10:11 AM
@drjohnsmith this is a module that is wrapped by few other modules. The "request" is actually a strobe signal that is coming as a WSTRB from AXI. "In" is the 12-bit WDATA that I am trying to write to the "out". This is a serial in parallel out shift registers that keep shifting 12-bit number. But it needs to shift 3000 times to feed incoming WDATA to 3000 people serially.
Both WDATA and WSTRB are coming from another wrapper module (a block design).
input s_axi_clk; input [11:0] in; output reg [N-1:0][11:0] out; (* max_fanout = 50 *) input in_strobe; int k =0; always @ (posedge s_axi_clk) begin if(in_strobe) begin for (k =0; k< N; k = k+1) begin if (k== N -1) out[k] <= in; else out[k] <= out[k+1]; end end end
04-04-2021 03:28 PM
MAX_FANOUT attributes need to go on the source register, not the input port. Because the source is a block design, you are probably going to have to do this via constraints on the actual synthesised register that connects to in_strobe