cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Visitor
Visitor
5,965 Views
Registered: ‎02-03-2010

AXI 1G/2.5G Ethernet Subsystem Example Design License error

Hi,

 

I am trying to evaluate the AXi 1G/2.5G Ethernet subsystem.  I have generated a hardware evaluation license as per the links from the product page but when I go to generate the bit strteam it fails with no bitstream generation allowed for AXI_ethernet_0_tri_mode_ethernet_MAC_v9_0_2.

 

I am using Vivado 2015.3 release.

0 Kudos
2 Replies
Highlighted
Xilinx Employee
Xilinx Employee
5,952 Views
Registered: ‎07-21-2014

Re: AXI 1G/2.5G Ethernet Subsystem Example Design License error

Hi,

Can you share output of following command
report_environment -file C:/folder_name/env.txt
share env.txt generated in folder.

-Shreyas
----------------------------------------------------------------------------------------------
Try to search answer for your issue in forums or xilinx user guides before you post a new thread.

Kindly note- Please mark the Answer as "Accept as solution" if information provided solves your query.
Give Kudos (star provided in right) to a post which you think is helpful and reply oriented.
----------------------------------------------------------------------------------------------
0 Kudos
Highlighted
Xilinx Employee
Xilinx Employee
5,934 Views
Registered: ‎07-21-2014

Re: AXI 1G/2.5G Ethernet Subsystem Example Design License error

Hi,

Any updates on this?

-Shreyas
----------------------------------------------------------------------------------------------
Try to search answer for your issue in forums or xilinx user guides before you post a new thread.

Kindly note- Please mark the Answer as "Accept as solution" if information provided solves your query.
Give Kudos (star provided in right) to a post which you think is helpful and reply oriented.
----------------------------------------------------------------------------------------------
0 Kudos