cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
mhmontazeri61
Adventurer
Adventurer
1,200 Views
Registered: ‎08-26-2013

Alveo U200 Network ports Problem

Hi,

AFter 2 questions about my problem on Alveo U200 for using it as a standard coprocessing card like other existing cases, i found that using qsfp ports has problems(as i read in xilinx support pages only) and using these ports as a single port without any communication with PC via PCIe port(embedded in U200) has problems too.

The last problem reported by Vivado is licensing problem i saw in bitstream generation part of HW compilation.I have not any solution or a short answer at least for my previous questions too. If there is a way for testing these two qsfp ports at least, please inform me here.

Thanks a lot

mhmontazeri61

0 Kudos
8 Replies
anatoli
Moderator
Moderator
1,180 Views
Registered: ‎06-14-2010

Hello @mhmontazeri61 ,

In relation to the licensing error you see at the bitstream generation, can you please share the exact error message that you see? 

In SDAccel 2019.1, you are required to have 3 licensing features: 'acceleration', 'ap_opencl' and 'ap_sdsoc'

Which feature is the error message complain that can't be found? Can you confirm on this please? Thanks in advance.

Kind Regards,
Anatoli Curran,
Xilinx Technical Support
------------------------------------------------------------------------------------------------

Don’t forget to reply, kudo, and accept as solution.

If starting with Versal, take a look at our Versal Design Process Hub and our
Versal Blogs

------------------------------------------------------------------------------------------------
0 Kudos
mhmontazeri61
Adventurer
Adventurer
1,137 Views
Registered: ‎08-26-2013

Hi @anatoli,

Attached file consists of the vivado report. Please provide me a solution. Also please represent solutions for other parts of my above question.

Best Regards

mhmontazeri61

0 Kudos
mhmontazeri61
Adventurer
Adventurer
1,133 Views
Registered: ‎08-26-2013

Excuse me @anatoli,

This is the file

PICVIVADO.PNG
0 Kudos
anatoli
Moderator
Moderator
1,092 Views
Registered: ‎06-14-2010

Hello @mhmontazeri61 ,

Please note that you'd need to raise an each issue separately, as having all of your issues reported in a single forum topic, these would be hard to address in a single thread. 

I will be able to help you with your  licensing issue, however for your other issue, this don't seems to be license related, so you'd need to raise a separate Forum topic on the Alveo forum board in relation to these QSFP ports issue (s) you have. A similar to the forum topic below:

https://forums.xilinx.com/t5/Alveo-Data-Center-Accelerator/The-usage-of-Ethernet-IP-via-2-QSFP-ports/td-p/961582

Hope this helps.

In relation to the licensing issue you are seeing at the bitstream generation in Vivado, to me it's related to the 40G/50G Ethernet Subsystem IP Core. Is that IP Core you are using in your design? 

If so, this IP Core is a licensed IP, so would need a relative 40G/50G Ethernet Subsystem IP Core license file. 
https://www.xilinx.com/support/documentation/ip_documentation/l_ethernet/v2_5/pg211-50g-ethernet.pdf
From the above Product Guide, here on page 7 you can find a licensing info that are required for this particular IP Core.

Therefore, the questions is, do you have a relative license file for this IP?

Can you please open your Vivado 2019.1 and run this Tcl Command report_ip_status and then see if a valid license is listed for this 40G/50G Ethernet Subsystem IP Core in the list?
You should see Purchased and not e.g. Design Entry (see my example screenshot below for one of the Video IP Core). Please send me a similar screenshot that you see at your end.

 

You should see Purchased and not e.g. Design Entry (see my example screenshot below for one of the Video IP Core). Please send me a similar screenshot that you see at your end.image.png

Hope this helps.

Kind Regards,
Anatoli Curran,
Xilinx Technical Support
------------------------------------------------------------------------------------------------

Don’t forget to reply, kudo, and accept as solution.

If starting with Versal, take a look at our Versal Design Process Hub and our
Versal Blogs

------------------------------------------------------------------------------------------------
0 Kudos
mhmontazeri61
Adventurer
Adventurer
1,065 Views
Registered: ‎08-26-2013

@anatoli,

My license status report is like the attached picture. Is there any way for solving my bitstream problem? It seems that my license is for linking to simulation only. Is this true?

Thanks in advance

Regards

mhmontazeri61

License4056.PNG
0 Kudos
anatoli
Moderator
Moderator
1,015 Views
Registered: ‎06-14-2010

Hello @mhmontazeri61 ,

Indeed, based on the report_ip_status report, you don't have a valid license for this 40G/50G Ethernet Subsystem IP Core.

To solve this, you'd need a valid non-Design_linking license for this.

If needed, you can obtain an IP Lic from here:

https://www.xilinx.com/products/intellectual-property/ef-di-50gemac.html

If this is just for testing purposes, you can click on 'Evaluate IP' licensing option. This will give you a free full hardware IP Core evaluation licence. See this AR for the limitations of this license:

https://www.xilinx.com/support/answers/42380.html

If you have any further questions for me, please let me know.

Hope this helps.

Kind Regards,
Anatoli Curran,
Xilinx Technical Support
------------------------------------------------------------------------------------------------

Don’t forget to reply, kudo, and accept as solution.

If starting with Versal, take a look at our Versal Design Process Hub and our
Versal Blogs

------------------------------------------------------------------------------------------------
0 Kudos
mhmontazeri61
Adventurer
Adventurer
990 Views
Registered: ‎08-26-2013

Hi @anatoli ,

I'm so worried from your answer. I have an Alveo card from Xilinx corporation bought from Digikey distributor approximately $10000. My required features of this card was qsfp ports,pcie port and the process part. At the first attempt, i found by many searches and forum's questions(without any document and application note) that we have not a straight forward design flow for qsfp ports and these ports are for commercial and selling purposes! After this phase, commencing low level implementation exposed to another big problem that is licensing purchased card capabilities?! I accept this obstacle for my final goal but i see that mentioned license price is $50000 required for implementation of a hardware part of my purchased card now!? I'm in a shock and confusing state that i expect your answer for this interesting support and quality of service.

Re

mhmontazeri61

0 Kudos
anatoli
Moderator
Moderator
987 Views
Registered: ‎06-14-2010

Hello @mhmontazeri61 ,

What i've explained above is the explanation in relation to why you are seeing this licensing error as this is in relation to an 40G/50G Ethernet Subsystem IP Core that you are targeting in your design. Is this IP that you must use for your design?
If so, please note that this IP Core requires a pay core license, so if you are designing for production purposes, then you'd need to purchase an IP Core lic. I don't know the price for this IP Core, and not sure where you see that this cost 50k, however my advice is for you to contact your local Xilinx Sales Representative and explain your situation. They will be able to help further with this.

For now, you can obtain a free Hardware Evaluation license for this core (https://www.xilinx.com/member/forms/registration/50g_eval.html) in order to bypass this licensing error.

Hope this helps.

Kind Regards,
Anatoli Curran,
Xilinx Technical Support
------------------------------------------------------------------------------------------------

Don’t forget to reply, kudo, and accept as solution.

If starting with Versal, take a look at our Versal Design Process Hub and our
Versal Blogs

------------------------------------------------------------------------------------------------
0 Kudos