12-27-2018 05:15 AM
Is it possible to connect 4 SoDIMM slots to a Kintex7 FPGA, to a single DDR (MIG 7) controller? And if so, how?
01-04-2019 09:32 AM
Hello @goychman,
I'll follow up and suggest moving on to an UltraScale based design since DDR4 supports much higher densities where even 128GB is possible for a single RDIMM. For 7-Series you would have to use two controllers with dual slot 16GB SODIMMs to achieve this density. Maybe there's a way to split the traffic/buffers between two cores?
12-27-2018 05:16 AM - edited 12-27-2018 05:16 AM
I need 64G memory (4*16G) to be connected to the FPGA for a new project :)
01-02-2019 10:09 AM
Hello @goychman,
Unfortunately this is not possible. The IP only supports dual slot configurations.
01-04-2019 09:32 AM
Hello @goychman,
I'll follow up and suggest moving on to an UltraScale based design since DDR4 supports much higher densities where even 128GB is possible for a single RDIMM. For 7-Series you would have to use two controllers with dual slot 16GB SODIMMs to achieve this density. Maybe there's a way to split the traffic/buffers between two cores?