08-22-2020 06:17 PM
Hi guys,
When you have time, may I ask if Xilinx provides interface descriptions for the following modules please ??
- PHASER_IN_PHY
- PHASER_OUT_PHY
I was just curious about these elements because I was just reading about the memory controller using my ZC706 evaluation board.
Thanks,
Have a nice day,
TH
09-14-2020 04:26 AM
There are some documentation in the following white paper:
https://www.xilinx.com/support/documentation/white_papers/wp393_7Series_IO_Memory.pdf#page=12