In my design i should design a high speed data acquisation system .
my DMA is programmed in such a way that it will transfer whole
1024 words from on chip memory data to DDR3 within one
clock cycle, which is a burst mode operation so plz help me in customising mig7 (mem interface generator ip in xilinx ise )
I presume you are using Vivado and not ISE. For guidance on how to set up the MIG, please refer to UG586, Chapter 1.