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Visitor tomas.kaplan
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Registered: ‎11-11-2019

Choosing DDR4 memory for PS side of Zynq US+

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Hello dear community,

we are choosing DDR4 memory for PS side of our XCZU11EG.
We are aiming for:
- 16GB of DDR4 memory on PS side of Zynq US+
- small footprint
- low cost

We have studied schematics of several devboard projects with Zynq US+ FPGAs and none of them uses more than 4GB of memory on no more than 1 memory rank and with only 1 logical rank per memory module. 

This chip would do the job for us: MT40A8G4CLU-062H
Its 3D Stacked memory module with 4 logical ranks with 4GB of memory per one memory module. We would use 4 of them in 1 memory rank and use 32bit wide data bus. 

We have also chosen the chip MT40A2G8-062E. With its parameters, we would need 8 of these to obtain 16 GB of memory.


Our questions are following:
1) Does PS side of Zynq US+ support 3DS memory modules from Micron? If yes, how should we connect signals C0 and C1 to address logical ranks within memory module? 
2) If the answer on question 1 is "NO", would you please recommend supported memory module with highest density so we would make 16GB with only 4 modules because of small footprint? 

We dont want to use SODIMM modules because of application where final product is going to be used. 

Thanks a lot for your answers

 

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Visitor tomas.kaplan
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Registered: ‎11-11-2019

Re: Choosing DDR4 memory for PS side of Zynq US+

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Hello @calebd,

Thanks for your input. 

There was an error on our side. We have tried to configure DDR PS Controller with timing parameters of TwinDie memory which was aforementioned at the beggining of this thread, but after that I posted datasheet of newer memory module MT40A2G8VA-062E, whish is not TwinDie one but it has same memory density. Sorry for that, as it consumed your time. 

We have made new PS DDR configuration for memory module from datasheet from my previous answer and we understood some more parameters so I hope it will be correct this time. Can you please look at that for one more time? 

Screenshot from 2019-11-19 12-59-25_cropped.pngScreenshot from 2019-11-19 12-59-31_cropped.png

Thanks for your time and effort

Thomas 

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Xilinx Employee
Xilinx Employee
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Registered: ‎01-09-2019

Re: Choosing DDR4 memory for PS side of Zynq US+

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@tomas.kaplan 

Even though this link has to do with RDIMMs it still tells relevant information: https://forums.xilinx.com/t5/Memory-Interfaces-and-NoC/Zynq-US-with-128GB-RDIMM-interface/td-p/787648

Basically if you are using the PS DDR Controller then a 3DS part would not work, but you would be able to put the controller in the PL and use a 3DS component.  That means you could use the PL DDR Controller with the first part you listed and would be able to get the memory density you desired.  Otherwise I don't believe you will physically be able to get 16GB using only 4 devices on the PS DDR Controller.

 

Thanks,
Caleb
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Scholar drjohnsmith
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Registered: ‎07-09-2009

Re: Choosing DDR4 memory for PS side of Zynq US+

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The PS side has a less flexible memory controller than the PL one,
its designed to work with certain chips,
but, being less flexible than the PL side, there is less to go wrong.
There is also a limit as to the memory size the PS can address,
https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf
page 426

If I remember, when you configure the DDR on the PS, you have a selection of pre configured / supported DDR memories, or put your own parameters in,
Id select one of the pre configured memories ,

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Visitor tomas.kaplan
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Registered: ‎11-11-2019

Re: Choosing DDR4 memory for PS side of Zynq US+

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Hello @calebd and @drjohnsmith 

Thanks a lot for valuable information! 

We are now thinking about only 8GB of DDR4 connected to PS and 4 or 8 GB connected to PL. 

For PS side of Zynq, we would like to use 4 of TwinDie memory modules MT40A2G8. These are essentially two rank modules with common addresses, data lines, commands etc., with two chipselects, so access to memory would be slower (1 rank at a time), but in this way, we would be able to populate only 4 chips to obtain 8GB of memory. So basically, there would be 4 of these chips, 4GB in memory rank 1, other 4 GB in memory rank 2. 

For 16GB, as I firstly asked, there would be need for a lot more chips on the board which does not correspond with our small footprint goal. 

For the PL side, we would like to use these 3DS chips, as I mentioned on my initial post to this thread. For now, we are thinking about 1 chip with 4 logical ranks with 4GB density on single chip. 

Question:
I have found excel table with supported memory modules, and MT40A2G8 TwinDie is probably suported, but specific model is already obsolete by Micron and recommended alternative part (from EOL document from Micron) is MT40A2G8VA-062E:B. Can you please confirm that this is a good approach and is that chip supported by Zynq US+?

Thanks a lot once again and have a nice day
Thomas

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Scholar drjohnsmith
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Registered: ‎07-09-2009

Re: Choosing DDR4 memory for PS side of Zynq US+

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If the part is not in the table of the MIG generator, be that for the PL or PS, then I think you have to enter the numbers and confirm yourself,
Are you using the latest version of the tools ?
Id suggest ask micron on the differences between the parts, it could be just a die revision, which had no impact on how they are used,
At the very least, you could compare line by line the data sheet of the supported and none supported part,
<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
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Xilinx Employee
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Registered: ‎01-09-2019

Re: Choosing DDR4 memory for PS side of Zynq US+

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@drjohnsmithand @tomas.kaplan 

On the PS DDR Controller we have provided a couple pre-configured options, but almost all configurations will need to be entered yourself.  In pretty much every case I would recommend going through the options yourself and using the tool tips to help when needed.  Once a configuration is selected, you could post on the forum to get a double check from an expert here.

On the PL DDR Controller we have provided a good amount of options, but there is also the option to go through the CSV flow in order to input a unique part: https://www.xilinx.com/support/answers/63462.html

Any differences in package number (nothing electrically related) shouldn't change the PL configuration and should be a drop in replacement, but that would depend a lot on the part.  I would double check with the forums in that case as well.

To @tomas.kaplan 's question: are you talking about using a TwinDie component using the PL DDR Controller or the PS DDR Controller (they are completely different controllers)?  The response ryana has here talks about the versatility of options on the PL DDR Controller: https://forums.xilinx.com/t5/Memory-Interfaces-and-NoC/Xilinx-Micron-memory-partnership/td-p/882254

If you look at UG1085 page 427 you can see that 16GB density is available with 8 components using 2 ranks: https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf .  The -062E speed grade corresponds to a 3200 speed grade which is not supported by either the PS or PL DDR controller.  You would need to run at a slower operating point which should be acceptable depending on what speed you are desiring to run at.  For maximum frequencies that the Zynq DDR Controllers can run at, I would look at DS925: https://www.xilinx.com/support/documentation/data_sheets/ds925-zynq-ultrascale-plus.pdf

Thanks,
Caleb
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Visitor tomas.kaplan
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Re: Choosing DDR4 memory for PS side of Zynq US+

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Hello @calebd and @drjohnsmith 

 

thanks for another valuable information. 

 

We have tried to configure PS DDR controller with timing parameters of memory chip MT40A2G8VA-062E:B. We know about maximal supported speed of memory, so we have configured these timing parameters through speed bin tables and backward compatibility. Our Zynq US+ is -1E speedgrade and it supports 2133 for dual die memory chips. Can you please confirm that this configuration is valid?

One more summary: We want to use 4 of these chips for PS side, x8 data width per chip, two memory ranks, 8GB memory density in total. 

There are two pictures attached. Upper one is scrolled up and bottom one is scrolled down so you can see whole configuration GUI. 

Screenshot from 2019-11-14 18-42-51.pngScreenshot from 2019-11-14 18-43-03.png

For the PL side of FPGA, we want to use aforementioned 3DS memory chips (MT40A4G8) with 4 logical ranks and we have found out that these are supported, so I believe there is not going to be any problem. 

I really appreciate your input and information 

Thanks, Tomas

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Xilinx Employee
Xilinx Employee
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Registered: ‎01-09-2019

Re: Choosing DDR4 memory for PS side of Zynq US+

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@tomas.kaplan 

Unfortunately I cannot zoom in on these images without losing resolution.  Can you take more detailed images of the DDR Configuration window?  If you provide a link to the datasheet for the Micron part, we don't need to have the images from that datasheet.

Thanks,
Caleb
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Visitor tomas.kaplan
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Re: Choosing DDR4 memory for PS side of Zynq US+

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@calebd 

Hello,

I am sorry, I did not test it out after posting..

Here are new cropped pictures:
03_cropped.png51_cropped.png

And here is the link for Micron component

Thanks a lot

Thomas

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Xilinx Employee
Xilinx Employee
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Registered: ‎01-09-2019

Re: Choosing DDR4 memory for PS side of Zynq US+

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@tomas.kaplan 

First, the operating point you will likely want to run at is the 2133R part (and you have chosen a CAS Latency of 16 to match that).  If you change that setting it will show that your tRC is incorrect for the operating point you have chosen so I would change to a value of 48 as the tooltip suggests.

Some of the other settings I am not sure how you got to.  For instance why is tRC 19 instead of 16 which is in the datasheet?  The page size for a x8 should be 1KB so tFAW can be lowered as well.  Because you are above the minimum for these values, they are fine to leave as is, but could cause some greater delay in memory accesses.

The configuration you have indicated does not seem to point towards a dual rank system.  These devices and the configuration indicated are not dual rank.  As well the device capacity should be 16Gb (it says so at the top of the Micron datasheet, as well as 2Gbx8=16Gb).  A dual rank system would have more devices to increase capacity without increasing the number of address bits.  Since you are indicating a total width of 32-bit then 4 x8 devices gets you to a 32-bit interface without using a dual rank topology.

The other thing I would note is it is not the best to give a .5 MHz input frequency to the device.  I would suggest just choosing either 1066 or 1067 for the speed you are requesting.  That should give a similar actual frequency, while staying within the timing parameters set.

Thanks,
Caleb
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Visitor tomas.kaplan
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Re: Choosing DDR4 memory for PS side of Zynq US+

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Hello @calebd,

Thanks for your input. 

There was an error on our side. We have tried to configure DDR PS Controller with timing parameters of TwinDie memory which was aforementioned at the beggining of this thread, but after that I posted datasheet of newer memory module MT40A2G8VA-062E, whish is not TwinDie one but it has same memory density. Sorry for that, as it consumed your time. 

We have made new PS DDR configuration for memory module from datasheet from my previous answer and we understood some more parameters so I hope it will be correct this time. Can you please look at that for one more time? 

Screenshot from 2019-11-19 12-59-25_cropped.pngScreenshot from 2019-11-19 12-59-31_cropped.png

Thanks for your time and effort

Thomas 

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Xilinx Employee
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Re: Choosing DDR4 memory for PS side of Zynq US+

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@tomas.kaplan 

That looks a lot more like what I would have expected.  From a configuration perspective for the part you indicated at the operating point indicated that is an adequate configuration.

Thanks,
Caleb
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Visitor tomas.kaplan
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Re: Choosing DDR4 memory for PS side of Zynq US+

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@calebd 

Thanks a lot for your time. I am going to mark that as solution of this thread.

Have a nice day

Thomas


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