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itsna
Visitor
Visitor
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Registered: ‎08-18-2016

Clock synchronization

Hello, I am designing a controller that writes or reads SDRAM by commands from PC, the design consists of UART interface, main controller and SDRAM controller, the main clock I use is 200 MHz. UART interface block and main controller block will get the clock from main clock, what I am confusing is, what clock should I use for SDRAM controller block, based on what I read, the clock should use the main clock for synchronization purpose, but the SDRAM that I use has maximum clock frequency 166 MHz, should I use a clock that fits with the SDRAM (maximum 166 MHz, use PLL to get the clock from the main clock) or should I use main clock (200 MHz) for the process in SDRAM controller and change the timing parameter and make another block inside SDRAM controller that generate the clock pulse (maximum 166 MHz) to the SDRAM? Or anyone has a better idea for the problem? Thank you very much
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keisn13
Observer
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Registered: ‎10-28-2013

Create from 200MHz new frequency 150 MHz with help MMCM or DCM (depend at your fpga) and use this frequency as main.

 

or

 

Create new frequences up to 166 MHz using MMCM or DCM and use FIFO for clock domain syncronization.

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itsna
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Visitor
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Registered: ‎08-18-2016

Actually, I need the 200 MHz clock for further expansion of the controller, as I about to add another block that requires 200 MHz as clock. Is it better if I generate special clock (max 166 MHz) for the SDRAM controller block and don't use the main clock? Is the synchronization timing going to be a problem? Or I should not use different clock frequency in one design? Thank you
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keisn13
Observer
Observer
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Registered: ‎10-28-2013

You may use a few clock signals in one project, but you need follow some rules of clock domain crossing.

I think it is a good solution run your controller and sdram at 150MHz.

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itsna
Visitor
Visitor
3,092 Views
Registered: ‎08-18-2016

Do you have some references that discuss about rules of clock domain crossing?
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keisn13
Observer
Observer
3,079 Views
Registered: ‎10-28-2013

I wrote 30 pages article about this, but she at russian :)
You may read some documents. But this topic you may find in many documents: ug903, ug906 and others. Use DocNav for looking "Clock domain crossing" and "Timing analysis"
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