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Adventurer
Adventurer
224 Views
Registered: ‎09-19-2018

DDR Memory interface device frequency is fixed. How to modify it ?

Hi,

I want to adapt this design to my FPGA, and I've noticed that the Memory interface device frequency is fixed:

fix1

I was expecting to have this (where I can modify the frequency):

fix2

 

How can I modify that frequency ?

Thanks in advance

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Xilinx Employee
Xilinx Employee
151 Views
Registered: ‎03-14-2016

Hello,

The PCW (3.2) should allow an option to adjust the device frequency.  Please see a capture of what I'm observing.

Please try restarting Vivado.  If that doesn't work, please rebuild your project.  If that doesn't work, please try reinstalling Vivado.

Thank you

pcw.png

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