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Visitor
Visitor
4,735 Views
Registered: ‎09-07-2011

DDR3-Read Burst; problem: 1st 64-bit data are missing in my ISE simulation / MIG generated DDR3-Controller

Hello!

 

I generated a DDR3-Controller with the MIG tool:

Burst-Length: 8 - Fixed

Burst Type: Sequential

 

On reads I can see the correct data on the dq's delivered by the RAM-model.

e.g. 64bit-words like following:

4 - 3 - 2 -1 -8 -7 -6 -5 -C -...

But the app_rd_data are delivered like:

3 -2 - 1 - 6 -....

(The last delivered data of the burst are 64-bit 'x').

 

Thanks in advance

Uli

 

 

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Visitor
Visitor
4,724 Views
Registered: ‎09-07-2011

I found the reason:

 

The generic setting must be:

constant SIM_BYPASS_INIT_CAL   : string := "FAST";

instead of SKIP

(abbreviated calib sequence is required)

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Voyager
Voyager
4,614 Views
Registered: ‎05-21-2008

Calibration is required for internal logic and it can not be skipped. So, FAST is required for this parameter.
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