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akarshana
Adventurer
Adventurer
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Registered: ‎03-06-2015

DDR3 memory banks with system clock bank selection

hi we are using virtex-7 and airtex-7 in our customised board. For these 2 FPGA's we are interfacing DDR3 memory. Banks selection for address lines, data line and control lines are fine . But I have studied in MIG controller data sheet, system clock should be given to the bank that is same in DDR3 address/control lines bank. Because of voltages issue it's not possible to given the system clock to same bank. So can I  use another bank mrcc pins to system clock? Or it is must be same bank 

Please suggest me to proceed our design further

 

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kren
Moderator
Moderator
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Registered: ‎08-21-2007

The clock input can be input on any CCIO in the column where the memory interface is located; this includes CCIO in banks that do not contain the memory interface, but must be in the same column as the memory interface.

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