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Participant
Participant
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Registered: ‎11-11-2016

DDR3 module position

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Good morning,

I am working with the MIG v4.2 for DDR3 memories, implementing on a XC7K325T, with Vivado 2019.2. Five DDR3 modules have been installed on the PCB with the following physical positioning scheme in fly-by configuration (see image):

  • U25, linked to DQ0-DQ15
  • U26, linked to DQ16-DQ31
  • U29, linked to DQ64-DQ71
  • U27, linked to DQ32-DQ47
  • U28, linked to DQ48-63.

This is to kindly ask whether the physical positioning scheme should be reordered in order for the MIG to correctly function or if the current configuration can be kept as is.

Thanks in advance, regards.

2020-05-27 10_19_55-Emilio Fazzoletto _ Microsoft Teams.png
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Xilinx Employee
Xilinx Employee
138 Views
Registered: ‎03-04-2018

Re: DDR3 module position

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Hello @eugeth20 ,

 

I think your routing is possible.  UG586 describes the Topology.  Before routing the PCB, please check the pin placement in Vivado if it is no error.

 

U25, linked to DQ0-DQ15

U26, linked to DQ16-DQ31

U29, linked to DQ64-DQ71

U27, linked to DQ32-DQ47

U28, linked to DQ48-63.

 

 

Best regards,

Kshimizu

 

Product Application Engineer Xilinx Technical Support

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ug586.PNG
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Xilinx Employee
Xilinx Employee
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Registered: ‎08-21-2007

回复: DDR3 module position

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Do you mean the fly-by toponology for the address/ control signals? You can change the physical posfition among the 5 components.

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Participant
Participant
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Registered: ‎11-11-2016

回复: DDR3 module position

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kren,

thanks for answering. Yes, it is in fly-by configuration for addr/ctrl signals. I was wondering whether the MIG requires DQ signals to be physically in order (i.e., DQ0 to DQ71) to correctly behave. That would mean repositioning the DDR3 modules in U25-U26-U27-U28-U29 fashion instead of the current configuration.

Regards.

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Xilinx Employee
Xilinx Employee
139 Views
Registered: ‎03-04-2018

Re: DDR3 module position

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Hello @eugeth20 ,

 

I think your routing is possible.  UG586 describes the Topology.  Before routing the PCB, please check the pin placement in Vivado if it is no error.

 

U25, linked to DQ0-DQ15

U26, linked to DQ16-DQ31

U29, linked to DQ64-DQ71

U27, linked to DQ32-DQ47

U28, linked to DQ48-63.

 

 

Best regards,

Kshimizu

 

Product Application Engineer Xilinx Technical Support

-------------------------------------------------------

Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.  Please Give Kudos.

-------------------------------------------------------

View solution in original post

ug586.PNG
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Participant
Participant
99 Views
Registered: ‎11-11-2016

Re: DDR3 module position

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kshimizu,

thanks! That is exactly what I was looking for.

Best regards.

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