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Adventurer
Adventurer
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Registered: ‎10-22-2017

HBM example design simulation errror

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I encountered a problem in the simulation HBM. Generated a HBM IP, and then open the example simulation ,report error:
[USF-XSim-62] 'elaborate' step failed with error(s). Please check the Tcl console output or '/home/shouqi/work/vivado_porject/2018_1/hbm_0_ex/hbm_0_ex.sim/sim_1/behav/xsim/elaborate .log' file for more information.

I opened the elaborate.log and found that the hbm_top module was not found. But this module has been listed in the program. Log information is as follows:
Vivado Simulator 2018.1
Copyright 1986-1999, 2001-2017 Xilinx, Inc. All Rights Reserved.
Running: /opt/Xilinx/Vivado/2018.1/bin/unwrapped/lnx64.o/xelab -wto 41810f46f5c045cf81bd24cb14a962fc --incr --debug typical --relax --mt 8 -L xil_defaultlib -L hbm_v1_0_0 -L unisims_ver -L unimacro_ver - L secureip -L xpm --snapshot sim_tb_top_behav xil_defaultlib.sim_tb_top xil_defaultlib.glbl -log elaborate.log
Using 8 slave threads.
Starting static elaboration
ERROR: [VRFC 10-2063] Module <hbm_top> not found while processing module instance <TWO_STACK.u_hbm_top> [/home/shouqi/work/vivado_porject/2018_1/hbm_0_ex/hbm_0_ex.srcs/sources_1/ip/hbm_0/hdl/rtl /hbm_v1_0_0.sv:3428]

Example without making any changes.

There is no problem with simulating other project.

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Moderator
Moderator
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Registered: ‎02-11-2014

Re: HBM example design simulation errror

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Hello @caoshouqi,

 

I ran through a single stack Ex Des and a dual stack Ex Des and ran into the issue in both using XSIM. I did find while digging through internal documentation that we do not have a memory model for XSIM, so that is why we do not support XSIM with HBM at this time.

 

Thanks,

Cory

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Moderator
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Registered: ‎02-11-2014

Re: HBM example design simulation errror

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Hello @caoshouqi,

 

The HBM Example Design only supports a single stack HBM configuration. Looking at the error message it looks like you are configured for two stacks right now. Please reconfigure for a single stack and see if you still have an issue.

 

I am currently clarifying if we support XSIM with the HBM Example Design as PG276 doesn't explicitly state we do. Currently we state the following:

 

Simulation is supported with the Verilog Compiler Simulator (VCS), Incisive Enterprise Simulator (IES), and Mentor Graphics Questa Advanced Simulator for a single stack HBM configuration.

 

Thanks,

Cory

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Highlighted
Moderator
Moderator
1,612 Views
Registered: ‎02-11-2014

Re: HBM example design simulation errror

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Hello @caoshouqi,

 

I ran through a single stack Ex Des and a dual stack Ex Des and ran into the issue in both using XSIM. I did find while digging through internal documentation that we do not have a memory model for XSIM, so that is why we do not support XSIM with HBM at this time.

 

Thanks,

Cory

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Adventurer
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Registered: ‎10-22-2017

Re: HBM example design simulation errror

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hello@coryb

Ok , I understand. Thank you very much.

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