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xifengw
Contributor
Contributor
471 Views
Registered: ‎04-10-2019

How to Use both HBM and DDR on the VCU128 board

Hello

I tried to use DDR and HBM at the same the on vcu128 board,The message indicates an error in the constraint file for DDR, but the file is read OnlyI tried the solution for this page

https://forums.xilinx.com/t5/%E5%AD%98%E5%82%A8%E6%8E%A5%E5%8F%A3-%E8%A7%86%E9%A2%91/%E5%9C%A8VCU128%E5%90%8C%E6%97%B6%E4%BD%BF%E7%94%A8HBM%E4%B8%8EDDR/m-p/1126319/highlight/false#M1335 

The IP setting and  logs are below. Please tell me the correct way to build IP.

 

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xifengw
Contributor
Contributor
470 Views
Registered: ‎04-10-2019

logs are shown in pic 2

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kshimizu
Xilinx Employee
Xilinx Employee
454 Views
Registered: ‎03-04-2018

Hello @xifengw ,

 

The output from clk_wiz is connected to the DDR4(MIG) in your design.  The MMCM output is not used as the sys_clk in DDR4(MIG).  System clock needs to use the GCIO pin.

 

Attached is from the PG150 which describes the MIG.

https://www.xilinx.com/support/documentation/ip_documentation/ultrascale_memory_ip/v1_4/pg150-ultrascale-memory-ip.pdf

 

 

 

Best regards,

Kshimizu

 

Product Application Engineer Xilinx Technical Support

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GCIO.PNG
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xifengw
Contributor
Contributor
437 Views
Registered: ‎04-10-2019

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